Datasheet

Rev. I | Page 24 of 68 | July 2010
ADSP-BF534/ADSP-BF536/ADSP-BF537
SPECIFICATIONS
Note that component specifications are subject to change
without notice.
OPERATING CONDITIONS
Parameter Conditions Min Nominal Max Unit
V
DDINT
Internal Supply Voltage
1
1
The regulator can generate V
DDINT
at levels of 0.85 V to 1.2 V with –5% to +10% tolerance, 1.25 V with –4% to +10% tolerance, and 1.3 V with –0% to +10% tolerance. The
required V
DDINT
is a function of speed grade and operating frequency. See Table 10, Table 11, and Table 12 for details.
Nonautomotive 300 MHz, 400 MHz, and 500 MHz speed
grade models
2
2
See Ordering Guide on Page 68.
0.8 1.2 1.32 V
V
DDINT
Internal Supply Voltage
1
Nonautomotive 533 MHz speed grade models
2
0.8 1.25 1.375 V
V
DDINT
Internal Supply Voltage
1
Nonautomotive 600 MHz speed grade models
2
0.8 1.3 1.43 V
V
DDINT
Internal Supply Voltage
1
Automotive grade models and +105°C nonautomotive
grade models
2
0.95 1.2 1.32 V
V
DDEXT
External Supply Voltage Nonautomotive grade models
2
2.25 2.5 or 3.3 3.6 V
V
DDEXT
External Supply Voltage Automotive grade models and +105°C nonautomotive
grade models
2
2.7 3.0 or 3.3 3.6 V
V
DDRTC
Real-Time Clock Power
Supply Voltage
2.25 3.6 V
V
IH
High Level Input Voltage
3, 4
3
Bidirectional pins (DATA15–0, PF15–0, PG15–0, PH15–0, TFS0, TSCLK0, RSCLK0, RFS0, MDIO) and input pins (BR, ARDY, DR0PRI, DR0SEC, RTXI, TCK, TDI, TMS,
TRST, CLKIN, RESET, NMI, and BMODE2–0) of the ADSP-BF534/ADSP-BF536/ADSP-BF537 are 3.3 V-tolerant (always accept up to 3.6 V maximum V
IH
). Voltage
compliance (on outputs, V
OH
) is limited by the V
DDEXT
supply voltage.
4
Parameter value applies to all input and bidirectional pins except CLKIN, SDA, and SCL.
V
DDEXT
= Maximum 2.0 V
V
IHCLKIN
High Level Input Voltage
5
5
Parameter value applies to CLKIN pin only.
V
DDEXT
= Maximum 2.2 V
V
IH5V
5.0 V Tolerant Pins, High
Level Input Voltage
6
6
Applies to pins PJ2/SCL and PJ3/SDA which are 5.0 V tolerant (always accept up to 5.5 V maximum V
IH
). Voltage compliance (on outputs, V
OH
) is limited by the V
DDEXT
supply
voltage.
0.7 × V
DDEXT
V
V
IH5V
5.0 V Tolerant Pins, High
Level Input Voltage
7
7
Applies to pin PJ4/DR0SEC/CANRX/TACI0 which is 5.0 V tolerant (always accepts up to 5.5 V maximum V
IH
). Voltage compliance (on outputs, V
OH
) is limited by the V
DDEXT
supply voltage.
V
DDEXT
= Maximum 2.0 V
V
IL
Low Level Input Voltage
3, 8
8
Parameter value applies to all input and bidirectional pins except SDA and SCL.
V
DDEXT
= Minimum +0.6 V
V
IL5V
5.0 V Tolerant Pins, Low
Level Input Voltage
6
0.3 × V
DDEXT
V
V
IL5V
5.0 V Tolerant Pins, Low
Level Input Voltage
7
V
DDEXT
= Minimum +0.8 V
T
J
Junction Temperature 208-Ball Chip Scale Package Ball Grid Array (CSP_BGA) @
T
AMBIENT
= –40°C to +105°C
–40 +120 °C
T
J
Junction Temperature 208-Ball Chip Scale Package Ball Grid Array (CSP_BGA) @
T
AMBIENT
= –40°C to +85°C
–40 +105 °C
T
J
Junction Temperature 208-Ball Chip Scale Package Ball Grid Array (CSP_BGA) @
T
AMBIENT
= 0°C to +70°C
0+95°C
T
J
Junction Temperature 182-Ball Chip Scale Package Ball Grid Array (CSP_BGA) @
T
AMBIENT
= –40°C to +85°C
–40 +105 °C
T
J
Junction Temperature 182-Ball Chip Scale Package Ball Grid Array (CSP_BGA) @
T
AMBIENT
= 0°C to +70°C
0+100°C