Datasheet

Rev. D | Page 57 of 88 | July 2013
ADSP-BF522/ADSP-BF523/ADSP-BF524/ADSP-BF525/ADSP-BF526/ADSP-BF527
Table 47. Serial Ports — External Late Frame Sync
ADSP-BF522/ADSP-BF524/
ADSP-BF526
ADSP-BF523/ADSP-BF525/
ADSP-BF527
Parameter
V
DDEXT
1.8V Nominal
V
DDEXT
2.5 V or 3.3V
Nominal
V
DDEXT
1.8V Nominal
V
DDEXT
2.5 V or 3.3V
Nominal
Min Max Min Max Min Max Min Max Unit
Switching Characteristics
t
DDTLFSE
Data Delay from Late External TFSx
or External RFSx in multi-channel mode
with MFD = 0
1, 2
12.0 10.0 12.0 10.0 ns
t
DTENLFSE
Data Enable from External RFSx in multi-
channel mode with MFD = 0
1, 2
0.0 0.0 0.0 0.0 ns
1
When in multi-channel mode, TFSx enable and TFSx valid follow t
DTENLFSE
and t
DDTLFSE
.
2
If external RFSx/TFSx setup to RSCLKx/TSCLKx > t
SCLKE
/2 then t
DDTTE/I
and t
DTENE/I
apply, otherwise t
DDTLFSE
and t
DTENLFSE
apply.
Figure 27. Serial Ports — External Late Frame Sync
RSCLKx
RFSx
DTx
DRIVE
EDGE
DRIVE
EDGE
SAMPLE
EDGE
EXTERNAL RFSx IN MULTI-CHANNEL MODE
1ST BIT
t
DTENLFSE
t
DDTLFSE
TSCLKx
TFSx
DTx
DRIVE
EDGE
DRIVE
EDGE
SAMPLE
EDGE
LATE EXTERNAL TFSx
1ST BIT
t
DDTLFSE