Rev. D | Page 46 of 88 | July 2013
ADSP-BF522/ADSP-BF523/ADSP-BF524/ADSP-BF525/ADSP-BF526/ADSP-BF527
In Figure 17, ND_DATA is ND_D0–D7.
Figure 17. NAND Flash Controller Interface Timing — Write Followed by Read Operation
ND_DATA
ND_CLE
t
CLWL
t
CLEWL
t
CLH
ARE
AWE
t
DWS
t
DWH
t
DRS
t
DRH
t
WHRL
t
WP
t
RP
ND_CE
