Datasheet

Rev. D | Page 45 of 88 | July 2013
ADSP-BF522/ADSP-BF523/ADSP-BF524/ADSP-BF525/ADSP-BF526/ADSP-BF527
In Figure 15, ND_DATA is ND_D0–D7.
Figure 15. NAND Flash Controller Interface Timing — Data Write Operation
ND_DATA
ND_CE
ND_CLE
ND_ALE
AWE
t
CWL
t
CLEWL
t
ALEWL
t
WC
t
DWS
t
DWH
t
DWS
t
DWH
t
WHWL
t
WP
t
WP
In Figure 16, ND_DATA is ND_D0–D7.
Figure 16. NAND Flash Controller Interface Timing — Data Read Operation
ND_DATA
t
RP
ND_CLE
ND_CE
ND_ALE
ARE
t
CRL
t
CRH
t
RP
t
RHRL
t
RC
t
DRS
t
DRH
t
DRS
t
DRH