Datasheet

Rev. D | Page 40 of 88 | July 2013
ADSP-BF522/ADSP-BF523/ADSP-BF524/ADSP-BF525/ADSP-BF526/ADSP-BF527
Table 33. Power-Up Reset Timing
Parameter Min Max Unit
Timing Requirement
t
RST_IN_PWR
RESET Deasserted after the V
DDINT
, V
DDEXT
, V
DDRTC
, V
DDUSB
, V
DDMEM
, V
DDOTP
, and CLKIN
Pins are Stable and Within Specification
3500 × t
CKIN
ns
In Figure 10, V
DD_SUPPLIES
is V
DDINT
, V
DDEXT
, V
DDRTC
, V
DDUSB
, V
DDMEM
, and V
DDOTP
.
Figure 10. Power-Up Reset Timing
RESET
t
RST_IN_PWR
CLKIN
V
DD_SUPPLIES