Datasheet

Rev. D | Page 35 of 88 | July 2013
ADSP-BF522/ADSP-BF523/ADSP-BF524/ADSP-BF525/ADSP-BF526/ADSP-BF527
Total Power Dissipation
Total power dissipation has two components:
1. Static, including leakage current
2. Dynamic, due to transistor switching characteristics
Many operating conditions can also affect power dissipation,
including temperature, voltage, operating frequency, and pro-
cessor activity. Electrical Characteristics on Page 32 shows the
current dissipation for internal circuitry (V
DDINT
). I
DDDEEPSLEEP
specifies static power dissipation as a function of voltage
(V
DDINT
) and temperature (see Table 22 or Table 24), and I
DDINT
specifies the total power specification for the listed test condi-
tions, including the dynamic component as a function of voltage
(V
DDINT
) and frequency (Table 23 or Table 25).
There are two parts to the dynamic component. The first part is
due to transistor switching in the core clock (CCLK) domain.
This part is subject to an Activity Scaling Factor (ASF) which
represents application code running on the processor core and
L1 memories (Table 21).
The ASF is combined with the CCLK Frequency and V
DDINT
dependent data in Table 23 or Table 25 to calculate this part.
The second part is due to transistor switching in the system
clock (SCLK) domain, which is included in the I
DDINT
specifica-
tion equation.
Table 21. Activity Scaling Factors (ASF)
1
1
See Estimating Power for ASDP-BF534/BF536/BF537 Blackfin Processors
(EE-297). The power vector information also applies to the ADSP-BF52x
processors.
I
DDINT
Power Vector Activity Scaling Factor (ASF)
I
DD-PEAK
1.29
I
DD-HIGH
1.26
I
DD-TYP
1.00
I
DD-APP
0.88
I
DD-NOP
0.72
I
DD-IDLE
0.44
Table 22. Static Current — I
DD-DEEPSLEEP
(mA) for ADSP-BF522/ADSP-BF524/ADSP-BF526 Processors
T
J
(°C)
1
Voltage (V
DDINT
)
1
1.2 V 1.25 V 1.3 V 1.35 V 1.4 V 1.45 V 1.5 V
–401.471.421.501.641.852.122.09
–201.671.811.891.952.012.072.12
0 1.972.072.152.222.302.392.47
25 2.49 2.66 2.79 2.92 3.07 3.20 3.36
40 3.12 3.37 3.57 3.75 3.96 4.18 4.40
55 4.07 4.47 4.82 5.11 5.41 5.73 6.06
70 5.77 6.28 6.71 7.17 7.61 8.09 8.60
85 8.32 8.88 9.56 10.25 10.94 11.63 12.36
100 12.11 12.93 13.94 14.76 15.76 16.77 17.83
105 13.78 14.72 15.74 16.81 17.91 19.06 20.27
1
Valid temperature and voltage ranges are model-specific. See Operating Conditions for ADSP-BF522/ADSP-BF524/ADSP-BF526 Processors on Page 28.
Table 23. Dynamic Current in CCLK Domain (mA, with ASF = 1.0)
1
for ADSP-BF522/ADSP-BF524/ADSP-BF526 Processors
f
CCLK
(MHz)
2
Voltage (V
DDINT
)
2
1.2 V 1.25 V 1.3 V 1.35 V 1.4 V 1.45 V 1.5 V
400 N/A N/A 91.41 95.7 100.11 104.51 109.01
350 N/A N/A 80.56 84.37 88.26 92.17 96.17
300 63.31 66.51 69.78 73.09 76.51 79.93 83.42
250 53.36 56.10 58.88 61.72 64.64 67.56 70.55
200 43.49 45.76 48.08 50.44 52.86 55.28 57.77
100 23.6 24.93 26.29 27.68 29.12 30.56 32.04
1
The values are not guaranteed as standalone maximum specifications. They must be combined with static current per the equations of Electrical Characteristics on Page 32.
2
Valid frequency and voltage ranges are model-specific. See Operating Conditions for ADSP-BF522/ADSP-BF524/ADSP-BF526 Processors on Page 28.