Datasheet
Rev. D | Page 28 of 88 | July 2013
ADSP-BF522/ADSP-BF523/ADSP-BF524/ADSP-BF525/ADSP-BF526/ADSP-BF527
SPECIFICATIONS
Specifications are subject to change without notice.
OPERATING CONDITIONS
FOR ADSP-BF522/ADSP-BF524/ADSP-BF526 PROCESSORS
Parameter Conditions Min Nominal Max Unit
V
DDINT
Internal Supply Voltage 1.235 1.47 V
V
DDEXT
External Supply Voltage
1
1
Must remain powered (even if the associated function is not used).
1.7 1.8 1.9 V
V
DDEXT
External Supply Voltage
1
2.25 2.5 2.75 V
V
DDEXT
External Supply Voltage
1
33.33.6V
V
DDRTC
RTC Power Supply Voltage
2
2
If not used, power with V
DDEXT
.
2.25 3.6 V
V
DDMEM
MEM Supply Voltage
1,
3
3
Balls that use V
DDMEM
are DATA15–0, ADDR19–1, ABE1–0, ARE, AWE, AOE, AMS3–0, ARDY, SA10, SWE, SCAS, CLKOUT, SRAS, SMS, SCKE. These balls are not tolerant
to voltages higher than V
DDMEM
.
1.7 1.8 1.9 V
V
DDMEM
MEM Supply Voltage
1,
3
2.25 2.5 2.75 V
V
DDMEM
MEM Supply Voltage
1,
3
33.33.6V
V
DDOTP
OTP Supply Voltage
1
2.25 2.5 2.75 V
V
PPOTP
OTP Programming Voltage
1
For Reads 2.25 2.5 2.75 V
For Writes
4
4
The V
PPOTP
voltage for writes must only be applied when programming OTP memory. There is a finite amount of cumulative time that this voltage may be applied (dependent
on voltage and junction temperature) over the lifetime of the part. Please see Table 30 on Page 38 for details.
6.9 7.0 7.1 V
V
DDUSB
USB Supply Voltage
5
5
When not using the USB peripheral on the ADSP-BF524/ADSP-BF526 or terminating V
DDUSB
on the ADSP-BF522, V
DDUSB
must be powered by V
DDEXT
.
3.0 3.3 3.6 V
V
IH
High Level Input Voltage
6, 7
6
Parameter value applies to all input and bidirectional balls, except USB_DP, USB_DM, USB_VBUS, SDA, and SCL.
7
Bidirectional balls (PF15–0, PG15–0, PH15–0) and input balls (RTXI, TCK, TDI, TMS, TRST, CLKIN, RESET, NMI, and BMODE3–0) of the ADSP-BF52x processors are
2.5 V tolerant (always accept up to 2.7 V maximum V
IH
). Voltage compliance (on outputs, V
OH
) is limited by the V
DDEXT
supply voltage.
V
DDEXT
/V
DDMEM
= 1.90 V 1.1 V
V
IH
High Level Input Voltage
6, 8
8
Bidirectional balls (PF15–0, PG15–0, PH15–0) and input balls (RTXI, TCK, TDI, TMS, TRST, CLKIN, RESET, NMI, and BMODE3–0) of the ADSP-BF52x processors are
3.3 V tolerant (always accept up to 3.6 V maximum V
IH
). Voltage compliance (on outputs, V
OH
) is limited by the V
DDEXT
supply voltage.
V
DDEXT
/V
DDMEM
= 2.75 V 1.7 V
V
IH
High Level Input Voltage
6, 8
V
DDEXT
/V
DDMEM
= 3.6 V 2.0 V
V
IHTWI
9
9
The V
IHTWI
min and max value vary with the selection in the TWI_DT field of the NONGPIO_DRIVE register. See V
BUSTWI
min and max values in Table 11.
High Level Input Voltage V
DDEXT
= 1.90 V/2.75 V/3.6 V 0.7 × V
BUSTWI
V
BUSTWI
V
V
IL
Low Level Input Voltage
6, 7
V
DDEXT
/V
DDMEM
= 1.7 V 0.6 V
V
IL
Low Level Input Voltage
6, 8
V
DDEXT
/V
DDMEM
= 2.25 V 0.7 V
V
IL
Low Level Input Voltage
6, 8
V
DDEXT
/V
DDMEM
= 3.0 V 0.8 V
V
ILTWI
Low Level Input Voltage V
DDEXT
= Minimum 0.3 × V
BUSTWI
10
10
SDA and SCL are pulled up to V
BUSTWI
. See Table 11.
V
T
J
Junction Temperature 289-Ball CSP_BGA
@T
AMBIENT
=0°C to +70°C
0+105°C
T
J
Junction Temperature 208-Ball CSP_BGA
@T
AMBIENT
=0°C to +70°C
0+105°C
T
J
Junction Temperature 208-Ball CSP_BGA
@T
AMBIENT
= –40°C to +85°C
–40 +105 °C