Datasheet

Rev. A | Page 71 of 80 | July 2011
ADSP-BF504/ADSP-BF504F/ADSP-BF506F
Figure 87. Serial Interface Timing Diagram
Figure 88. Reading Data from Both ADCs on One D
OUT
Line with 32 ADSCLKs
CS
ADSCLK
1
5
13
D
OUT
A
D
OUT
B
2 LEADING ZEROS
THREE-
STATE
t
4
2
34
t
5
t
3
t
QUIET
t
2
THREE-STATE
DB11
DB10
DB2
DB0
t
6
t
7
t
8
0
0
DB1
B
DB9 DB8
t
9
CS
ADSCLK
1
5
15
D
OUT
A
THREE-
STATE
t
4
2
34
16
t
5
t
3
t
2
THREE-
STATE
t
6
t
7
14
ZERO0 ZERO
DB11
B
17
2 LEADING ZEROS
t
10
32
DB11
A
2 LEADING
ZEROS
DB10
A
DB9
A
ZEROZERO ZERO
2 TRAILING ZEROS
ZERO ZERO
2 TRAILING ZEROS