Datasheet

Rev. A | Page 40 of 80 | July 2011
ADSP-BF504/ADSP-BF504F/ADSP-BF506F
Table 33. Serial Ports — External Late Frame Sync
Parameter
V
DDEXT
= 1.8 V V
DDEXT
= 2.5 V/3.3 V
Min Max Min Max Unit
Switching Characteristics
t
DDTLFSE
Data Delay from Late External TFSx
or External RFSx in Multi-channel Mode With MFD = 0
1, 2
12.0 10.0 ns
t
DTENLFSE
Data Enable from External RFSx in Multi-channel Mode With
MFD = 0
1, 2
0.0 0.0 ns
1
When in multi-channel mode, TFSx enable and TFSx valid follow t
DTENLFSE
and t
DDTLFSE
.
2
If external RFSx/TFSx setup to RSCLKx/TSCLKx > t
SCLKE
/2 then t
DDTTE/I
and t
DTENE/I
apply, otherwise t
DDTLFSE
and t
DTENLFSE
apply.
Figure 22. Serial Ports — External Late Frame Sync
RSCLKx
RFSx
DTx
DRIVE
EDGE
DRIVE
EDGE
SAMPLE
EDGE
EXTERNAL RFSx IN MULTI-CHANNEL MODE
1ST BIT
t
DTENLFSE
t
DDTLFSE
TSCLKx
TFSx
DTx
DRIVE
EDGE
DRIVE
EDGE
SAMPLE
EDGE
LATE EXTERNAL TFSx
1ST BIT
t
DDTLFSE