Datasheet

Rev. A | Page 39 of 80 | July 2011
ADSP-BF504/ADSP-BF504F/ADSP-BF506F
Figure 20. Serial Ports
Table 32. Serial Ports—Enable and Three-State
Parameter
V
DDEXT
= 1.8 V V
DDEXT
= 2.5 V/3.3 V
Min Max Min Max Unit
Switching Characteristics
t
DTENE
Data Enable Delay from External TSCLKx
1
0.0 0.0 ns
t
DDTTE
Data Disable Delay from External TSCLKx
1
t
SCLK
+1 t
SCLK
+1 ns
t
DTENI
Data Enable Delay from Internal TSCLKx
1
–2.0 –2.0 ns
t
DDTTI
Data Disable Delay from Internal TSCLKx
1
t
SCLK
+1 t
SCLK
+1 ns
1
Referenced to drive edge.
Figure 21. Serial Ports — Enable and Three-State
t
SDRI
RSCLKx
DRx
DRIVE EDGE
t
HDRI
t
SFSI
t
HFSI
t
DFSI
t
H
OFSI
t
SCLKIW
DATA RECEIVE—INTERNAL CLOCK
t
SDRE
DATA RECEIVE—EXTERNAL CLOCK
RSCLKx
DRx
t
HDRE
t
SFSE
t
HFSE
t
DFSE
t
SCLKEW
t
HOFSE
t
DDTI
t
HDTI
TSCLKx
TFSx
(INPUT)
DTx
t
SFSI
t
HFSI
t
SCLKIW
t
DFSI
t
HOFSI
DATA TRANSMIT—INTERNAL CLOCK
t
DDTE
t
HDTE
TSCLKx
DTx
t
SFSE
t
DFSE
t
SCLKEW
t
HOFSE
DATA TRANSMIT—EXTERNAL CLOCK
SAMPLE EDGE
DRIVE EDGE SAMPLE EDGE DRIVE EDGE SAMPLE EDGE
DRIVE EDGE SAMPLE EDGE
t
SCLKE
t
SCLKE
t
HFSE
TFSx
(OUTPUT)
TFSx
(INPUT)
TFSx
(OUTPUT)
RFSx
(INPUT)
RFSx
(OUTPUT)
RFSx
(INPUT)
RFSx
(OUTPUT)
TSCLKx
DTx
DRIVE EDGE
t
DDTTE/I
t
DTENE/I
DRIVE EDGE