Datasheet

Rev. A | Page 37 of 80 | July 2011
ADSP-BF504/ADSP-BF504F/ADSP-BF506F
Table 29. RSI Controller Timing (High Speed Mode)
Parameter Min Max Unit
Timing Requirements
t
ISU
Input Setup Time 5.75 ns
t
IH
Input Hold Time 2 ns
Switching Characteristics
f
PP
1
Clock Frequency Data Transfer Mode 0 50 MHz
t
WL
Clock Low Time 7 ns
t
WH
Clock High Time 7 ns
t
TLH
Clock Rise Time 3ns
t
THL
Clock Fall Time 3ns
t
ODLY
Output Delay Time During Data Transfer Mode 2.5 ns
t
OH
Output Hold Time 2.5 ns
1
t
PP
= 1/f
PP
Figure 19. RSI Controller Timing (High-Speed Mode)
SD_CLK
INPUT
OUTPUT
t
ISU
NOTES:
1 INPUT INCLUDES SD_Dx AND SD_CMD SIGNALS.
2 OUTPUT INCLUDES SD_Dx AND SD_CMD SIGNALS.
t
THL
t
TLH
t
WL
t
WH
t
PP
t
IH
t
ODLY
t
OH
V
OH (MIN)
V
OL (MAX)