Datasheet

For current information contact Analog Devices at 800/262-5643
ADSP-2196 September 2001
This information applies to a product under development. Its characteristics and specifications are subject to change with-
out notice. Analog Devices assumes no obligation regarding future manufacturing unless otherwise agreed to in writing.
20 REV. PrA

PF2
/SPI0SEL1
/MSEL2
I/O/T
I
I
Programmable Flags 2/SPI0 Slave Select output 1 (when SPI0 enabled)/Multiplier Select 2
(during boot)
PF1
/SPISS1
/MSEL1
I/O/T
I
I
Programmable Flags 1/SPI1 Slave Select input (when SPI1 enabled)/Multiplier Select 1
(during boot)
PF0
/SPISS0
/MSEL0
I/O/T
I
I
Programmable Flags 0/SPI0 Slave Select input (when SPI0 enabled)/Multiplier Select 0
(during boot)
RD
O/T External Port Read Strobe
WR
O/T External Port Write Strobe
ACK I External Port Access Ready Acknowledge
BMS
O/T External Port Boot Space Select
IOMS
O/T External Port IO Space Select
MS30
O/T External Port Memory Space Selects
BR
IExternal Port Bus Request
BG
OExternal Port Bus Grant
BGH
OExternal Port Bus Grant Hang
HAD15–0 I/O/T Host Port Multiplexed Address and Data Bus
HA16 I Host Port MSB of Address Bus
HACK_P I Host Port ACK Polarity
HRD
IHost Port Read Strobe
HWR
IHost Port Write Strobe
HACK O Host Port Access Ready Acknowledge
HALE I Host Port Address Latch Strobe or Address Cycle Control
HCMS
I Host Port Internal Memory–Internal I/O Memory–Boot Memory Select
HCIOMS
I Host Port Internal I/O Memory Select
CLKIN I Clock Input/Oscillator input
XTAL O Oscillator output
BMODE1–0 I Boot Mode 1–0. The BMODE1 and BMODE0 pins have 85 k
internal pull-up resistors.
OPMODE I Operating Mode. The OPMODE pin has a 85 k
internal pull-up resistor.
CLKOUT O Clock Output
BYPASS I Phase-Lock-Loop (PLL) Bypass mode. The BYPASS pin has a 85 k
internal pull-up
resistor.
Table 7. Pin Descriptions (Continued)
Pin Type Function