Datasheet

–17–REV. A
ADSP-2191M
TMR2–0 I/O/T Timer Output or Capture
RXD I UART Serial Receive Data
TXD O UART Serial Transmit Data
RESET
I Processor Reset. Resets the ADSP-2191M to a known state and begins execution at the
program memory location specified by the hardware reset vector address. The RESET input
must be asserted (low) at powerup. The RESET pin has an 85 kΩ internal pull-up resistor.
TCK I Test Clock (JTAG). Provides a clock for JTAG boundary scan. The TCK pin has an 85 kΩ
internal pull-up resistor.
TMS I Test Mode Select (JTAG). Used to control the test state machine. The TMS pin has an 85 kΩ
internal pull-up resistor.
TDI I Test Data Input (JTAG). Provides serial data for the boundary scan logic. The TDI pin has a
85 kΩ internal pull-up resistor.
TDO O Test Data Output (JTAG). Serial scan output of the boundary scan path.
TRST
I Test Reset (JTAG). Resets the test state machine. TRST must be asserted (pulsed low) after
powerup or held low for proper operation of the ADSP-2191M. The TRST pin has a 65 kΩ
internal pull-down resistor.
EMU
O Emulation Status (JTAG). Must be connected to the ADSP-2191M emulator target board
connector only.
V
DDINT
P Core Power Supply. Nominally 2.5 V dc and supplies the DSP’s core processor. (four pins)
V
DDEXT
P I/O Power Supply. Nominally 3.3 V dc. (nine pins)
GND G Power Supply Return. (twelve pins)
NC Do Not Connect. Reserved pins that must be left open and unconnected.
Table 7. Pin Function Descriptions (continued)
Pin Type Function