Datasheet

REV. 0
–22–
ADSP-2188M
15
POWER (P
IDLE
n) – mW
24mW
19mW
18mW
19mW
21mW
32mW
POWER, IDLE n MODES
2
1/t
CK
– MHz
50 75
20
25
30
35
40
55 60 7065
10
IDLE (16)
IDLE (128)
IDLE
15
POWER (P
IDLE
) – mW
28mW
36mW
24mW
32mW
20mW
28mW
POWER, IDLE
1, 2, 4
1/t
CK
– MHz
50
20
25
30
35
40
45
55 60 65 70 75
V
DDINT
= 2.9V
V
DDINT
= 2.75V
V
D
D
IN
T
= 2.6V
1/t
CK
– MHz
5045
75
101mW
88mW
78mW
129mW
111mW
POWER, INTERNAL
1, 2, 3
145mW
POWER (P
INT
) – mW
70
55 60 65 70 75
100
105
110
115
120
125
130
135
140
145
150
85
80
95
90
V
DDINT
= 2.9V
V
DDINT
= 2.75V
V
DDINT
= 2.6V
NOTES:
VALID FOR ALL TEMPERATURE GRADES.
1
POWER REFLECTS DEVICE OPERATING WITH NO OUTPUT LOADS.
2
TYPICAL POWER DISSIPATION AT 2.75V V
DDINT
AND 25ⴗC, EXCEPT
WHERE SPECIFIED.
3
I
DD
MEASUREMENT TAKEN WITH ALL INSTRUCTIONS EXECUTING
FROM INTERNAL MEMORY. 50% OF THE INSTRUCTIONS ARE
MULTIFUNCTION (TYPES 1, 4, 5, 12, 13, 14), 30% ARE TYPE 2 AND
TYPE 6, AND 20% ARE IDLE INSTRUCTIONS.
4
IDLE REFERS TO STATE OF OPERATION DURING EXECUTION
OF IDLE INSTRUCTION. DEASSERTED PINS ARE DRIVEN TO
EITHER V
DD
OR GND.
Figure 15. Power vs. Frequency
Capacitive Loading
Figure 16 and Figure 17 show the capacitive loading character-
istics of the ADSP-2188M.
C
L
– pF
RISE TIME (0.4V–2.4V) – ns
30
3000
50
100 150 200 250
25
15
10
5
0
20
T = 85ⴗC
V
DD
= 0V TO 2.0V
Figure 16. Typical Output Rise Time vs. Load Capacitance
(at Maximum Ambient Operating Temperature)
C
L
– pF
14
0
VALID OUTPUT DELAY OR HOLD – ns
50 100 150 250200
12
4
2
–2
10
8
NOMINAL
16
18
6
–4
–6
Figure 17. Typical Output Valid Delay or Hold vs. Load
Capacitance, C
L
(at Maximum Ambient Operating
Temperature)