Datasheet

REV. 0
–19–
ADSP-2188M
RECOMMENDED OPERATING CONDITIONS
K Grade B Grade
Parameter Min Max Min Max Unit
V
DDINT
2.61 2.89 2.25 2.75 V
V
DDEXT
2.61 3.6 2.25 3.6 V
V
INPUT
1
V
IL
= –0.3 V
IH
= +3.6 V
IL
= –0.3 V
IH
= +3.6 V
T
AMB
0 +70 –40 +85 °C
NOTES
1
The ADSP-2188M is 3.3 V tolerant (always accepts up to 3.6 V max V
IH
), but voltage compliance (on outputs, V
OH
) depends on the input V
DDEXT
; because V
OH
(max)
≈ V
DDEXT
(max). This applies to bidirectional pins (D0–D23, RFS0, RFS1, SCLK0, SCLK1, TFS0, TFS1, A1–A13, PF0–PF7) and input only pins (CLKIN, RESET,
BR, DR0, DR1, PWD).
Specifications subject to change without notice.
ELECTRICAL CHARACTERISTICS
K/B Grades
Parameter Test Conditions Min Typ Max Unit
V
IH
Hi-Level Input Voltage
1, 2
@ V
DDINT
= max 1.5 V
V
IH
Hi-Level CLKIN Voltage @ V
DDINT
= max 2.0 V
V
IL
Lo-Level Input Voltage
1, 3
@ V
DDINT
= min 0.7 V
V
OH
Hi-Level Output Voltage
1, 4, 5
@ V
DDEXT
= min, I
OH
= –0.5 mA 2.0 V
@ V
DDEXT
= 3.0 V, I
OH
= –0.5 mA 2.4 V
@ V
DDEXT
= min, I
OH
= –100 µA
6
V
DDEXT
– 0.3 V
V
OL
Lo-Level Output Voltage
1, 4, 5
@ V
DDEXT
= min, I
OL
= 2 mA 0.4 V
I
IH
Hi-Level Input Current
3
@ V
DDINT
= max, V
IN
= 3.6 V 10 µA
I
IL
Lo-Level Input Current
3
@ V
DDINT
= max, V
IN
= 0 V 10 µA
I
OZH
Three-State Leakage Current
7
@ V
DDEXT
= max, V
IN
= 3.6 V
8
10 µA
I
OZL
Three-State Leakage Current
7
@ V
DDEXT
= max, V
IN
= 0 V
8
10 µA
I
DD
Supply Current (Idle)
9
@ V
DDINT
= 2.75, t
CK
= 15 ns 9 mA
I
DD
Supply Current (Idle)
9
@ V
DDINT
= 2.75, t
CK
= 13.3 ns 10 mA
I
DD
Supply Current (Dynamic)
10
@ V
DDINT
= 2.75, t
CK
= 15 ns
11
, T
AMB
= 25°C44mA
I
DD
Supply Current (Dynamic)
10
@ V
DDINT
= 2.75, t
CK
= 13.3 ns
11
, T
AMB
= 25°C42mA
I
DD
Supply Current (Power-Down)
12
@ V
DDINT
= 2.75, T
AMB
= 25°C in Lowest 100 µA
Power Mode
C
I
Input Pin Capacitance
3, 6
@ V
IN
= 2.75 V, f
IN
= 1.0 MHz, T
AMB
= 25°C8pF
C
O
Output Pin Capacitance
6, 7, 12, 13
@ V
IN
= 2.75 V, f
IN
= 1.0 MHz, T
AMB
= 25°C8pF
NOTES
1
Bidirectional pins: D0–D23, RFS0, RFS1, SCLK0, SCLK1, TFS0, TFS1, A1–A13, PF0–PF7.
2
Input only pins: RESET, BR, DR0, DR1, PWD.
3
Input only pins: CLKIN, RESET, BR, DR0, DR1, PWD.
4
Output pins: BG, PMS, DMS, BMS, IOMS, CMS, RD, WR, PWDACK, A0, DT0, DT1, CLKOUT, FL2–0, BGH.
5
Although specified for TTL outputs, all ADSP-2188M outputs are CMOS-compatible and will drive to V
DDEXT
and GND, assuming no dc loads.
6
Guaranteed but not tested.
7
Three-statable pins: A0–A13, D0–D23, PMS, DMS, BMS, IOMS, CMS, RD, WR, DT0, DT1, SCLK0, SCLK1, TFS0, TFS1, RFS0, RFS1, PF0–PF7.
8
0 V on BR.
9
Idle refers to ADSP-2188M state of operation during execution of IDLE instruction. Deasserted pins are driven to either V
DD
or GND.
10
I
DD
measurement taken with all instructions executing from internal memory. 50% of the instructions are multifunction (Types 1, 4, 5, 12, 13, 14), 30% are Type 2
and Type 6, and 20% are idle instructions.
11
V
IN
= 0 V and 3 V. For typical figures for supply currents, refer to Power Dissipation section.
12
See Chapter 9 of the ADSP-2100 Family User’s Manual for details.
13
Output pin capacitance is the capacitive load for any three-stated output pin.
Specifications subject to change without notice.
SPECIFICATIONS