Datasheet

ADSP-2184L/ADSP-2185L/ADSP-2186L/ADSP-2187L
Rev. C | Page 33 of 48 | January 2008
IDMA Read, Long Read Cycle
Table 23. IDMA Read, Long Read Cycle
Parameter Min Max Unit
Timing Requirements:
t
IKR
IACK Low Before Start of Read
1
0ns
t
IRK
End of Read After IACK Low
2
2ns
Switching Characteristics:
t
IKHR
IACK High After Start of Read
1,
3
17 ns
t
IKDS
IAD150 Data Setup Before IACK Low 0.5t
CK
– 10 ns
t
IKDH
IAD15 0 Data Hold After End of Read
2
0ns
t
IKDD
IAD150 Data Disabled After End of Read
2
10 ns
t
IRDE
IAD150 Previous Data Enabled After Start of Read 0 ns
t
IRDV
IAD150 Previous Data Valid After Start of Read
4
15 ns
t
IRDH1
IAD150 Previous Data Hold After Start of Read (DM/PM1)
5
2t
CK
– 5 ns
t
IRDH2
IAD150 Previous Data Hold After Start of Read (PM2)
6
t
CK
– 5 ns
1
Start of Read = IS Low and IRD Low.
2
End of Read = IS High or IRD High.
3
For the ADSP-2185L, and the ADSP-2187L, this specification is 4 ns min., and 15 ns max.
4
For the ADSP-2187L, this specification is 10 ns max.
5
DM read or first half of PM read.
6
Second half of PM read.
Figure 25. IDMA Read, Long Read Cycle
t
IRK
t
IKR
PREVIOUS
DATA
READ
DATA
t
IKHR
t
IKDS
t
IRDV
t
IKDD
t
IRDE
t
IKDH
IAD15–0
IACK
IS
IRD
t
IRDH1 OR
t
IRDH2