Datasheet

Rev. C | Page 28 of 48 | January 2008
ADSP-2184L/ADSP-2185L/ADSP-2186L/ADSP-2187L
Serial Ports
Table 19. Serial Ports
Parameter Min Max Unit
Timing Requirements:
t
SCK
SCLK Period
1
50 ns
t
SCS
DR/TFS/RFS Setup Before SCLK Low 4 ns
t
SCH
DR/TFS/RFS Hold After SCLK Low
2
8ns
t
SCP
SCLKIN Width
3
20 ns
Switching Characteristics:
t
CC
CLKOUT High to SCLKOUT 0.25t
CK
0.25t
CK
+ 10 ns
t
SCDE
SCLK High to DT Enable 0 ns
t
SCDV
SCLK High to DT Valid 15 ns
t
RH
TFS/RFS
OUT
Hold After SCLK High 0 ns
t
RD
TFS/RFS
OUT
Delay from SCLK High 15 ns
t
SCDH
DT Hold after SCLK High 0 ns
t
TDE
TFS (Alt) to DT Enable 0 ns
t
TDV
TFS (Alt) to DT Valid 14 ns
t
SCDD
SCLK High to DT Disable 15 ns
t
RDV
RFS (Multichannel, Frame Delay Zero) to DT Valid 15 ns
1
For the ADSP-2187L, this specification is 38 ns min.
2
For the ADSP-2187L, this specification is 7 ns min.
3
For the ADSP-2185L, and the ADSP-2187L, this specification is 15 ns min.