Datasheet

Rev. C | Page 26 of 48 | January 2008
ADSP-2184L/ADSP-2185L/ADSP-2186L/ADSP-2187L
Memory Read
Table 17. Memory Read
Parameter Min Max Unit
Timing Requirements:
t
RDD
RD Low to Data Valid
1
0.5t
CK
– 9 + w ns
t
AA
A13–0, xMS to Data Valid
2
0.75t
CK
– 12.5 + w ns
t
RDH
Data Hold from RD High
3
1ns
Switching Characteristics:
t
RP
RD Pulse Width 0.5t
CK
– 5 + w ns
t
CRD
CLKOUT High to RD Low 0.25t
CK
– 5 0.25t
CK
+ 7 ns
t
ASR
A13–0, xMS Setup Before RD Low 0.25t
CK
– 6 ns
t
RDA
A13–0, xMS Hold After RD Deasserted 0.25t
CK
– 3 ns
t
RWR
RD High to RD or WR Low 0.5t
CK
– 5 ns
1
w = wait states × t
CK
.
2
xMS = PMS, DMS, CMS, IOMS, BMS.
3
For the ADSP-2187L, this specification is 0 ns min.
Figure 19. Memory Read
CLKOUT
ADDRESS LINES
1
DATA LINES
2
t
RDA
t
RWR
t
RP
t
ASR
t
CRD
t
RDD
t
AA
t
RDH
DMS, PMS,
BMS, IOMS,
CMS
RD
WR
1
ADDRESS LINES F OR ACCESSES ARE:
2
DATA LINES FOR ACCESS E S ARE:
BDMA: A13–0 (14 LSBs), D23–16 (8 MSBs) BDMA: D15–8
I/O S PACE: A10–0 I/O SPACE: D23–8
EXTERNAL PM AND DM : A13–0 EXTERNAL DM: D23–8
EXTERNAL PM: D23–0