Datasheet

ADSP-2186
–33–
REV. B
The ADSP-2186 Mini-BGA package pinout is shown in the table below. Pin names in bold text replace the plain text named func-
tions when Mode C = 1. A + sign separates two functions when either function can be active for either major I/O mode. Signals
enclosed in brackets [ ] are state bits latched from the value of the pin at the deassertion of RESET.
Mini-BGA Package Pinout
Ball # Name Ball # Name Ball # Name Ball # Name
A01 A2/IAD1 D01 N/C G01 XTAL K01 N/C
A02 A1/IAD0 D02 WR G02 N/C K02 N/C
A03 GND D03 N/C G03 GND K03 N/C
A04 A0 D04 BGH G04 A10/IAD9 K04 BMS
A05 N/C D05 A9/IAD8 G05 N/C K05 DMS
A06 GND D06 PF1[MODE B] G06 N/C K06 RFS0
A07 N/C D07 PF2[MODE C] G07 N/C K07 TFS1/IRQ1
A08 N/C D08 N/C G08 D6/IRD K08 SCLK1
A09 N/C D09 D13 G09 D5/IAL K09 ERESET
A10 D22 D10 D12 G10 N/C K10 EBR
A11 GND D11 N/C G11 N/C K11 BR
A12 GND D12 GND G12 D4/IS K12 EBG
B01 A4/IAD3 E01 VDD H01 CLKIN L01 IRQE+PF4
B02 A3/IAD2 E02 VDD H02 GND L02 N/C
B03 GND E03 A8/IAD7 H03 GND L03 IRQL1+PF6
B04 N/C E04 FL0 H04 GND L04 IOMS
B05 N/C E05 PF0[MODE A] H05 VDD L05 GND
B06 GND E06 FL2 H06 DT0 L06 PMS
B07 VDD E07 PF3 H07 TFS0 L07 DR0
B08 D23 E08 GND H08 D2/IAD15 L08 GND
B09 D20 E09 GND H09 D3/IACK L09 RESET
B10 D18 E10 VDD H10 GND L10 ELIN
B11 D17 E11 GND H11 N/C L11 ELOUT
B12 D16 E12 D10 H12 GND L12 EINT
C01 PWDACK F01 A13/IAD12 J01 CLKOUT M01 IRQL0+PF5
C02 A6/IAD5 F02 N/C J02 VDD M02 IRQ2+PF7
C03 RD F03 A12/IAD11 J03 N/C M03 N/C
C04 A5/IAD4 F04 A11/IAD10 J04 VDD M04 CMS
C05 A7/IAD6 F05 FL1 J05 VDD M05 GND
C06 PWD F06 N/C J06 SCLK0 M06 DT1/FO
C07 VDD F07 N/C J07 D0/IAD13 M07 DR1/FI
C08 D21 F08 D7/IWR J08 RFS1/IRQ0 M08 GND
C09 D19 F09 D11 J09 BG M09 N/C
C10 D15 F10 D8 J10 D1/IAD14 M10 EMS
C11 N/C F11 N/C J11 VDD M11 EE
C12 D14 F12 D9 J12 VDD M12 ECLK