Datasheet

ADSP-21469
Rev. 0 | Page 37 of 72 | June 2010
Table 33. Link Ports—Transmit
Parameter Min Max Unit
Timing Requirements
t
SLACH
LACK Setup Before LCLK Low 8.5 ns
t
HLACH
LACK Hold After LCLK Low 0 ns
Switching Characteristics
t
DLDCH
Data Delay After LCLK High 1 ns
t
HLDCH
Data Hold After LCLK High –1 ns
t
LCLKTWL
LCLK Width Low 0.5 × t
LCLK
– 0.4 0.6 × t
LCLK
+ 0.4
1
ns
t
LCLKTWH
LCLK Width High 0.4 × t
LCLK
– 0.4
1
0.5 × t
LCLK
+ 0.4 ns
t
DLACLK
LCLK Low Delay After LACK High t
LCLK
– 2 t
LCLK
+ 8 ns
1
For 1:2.5 ratio. For other ratios this specification is 0.5 × t
LCLK
– 1.
Figure 23. Link Ports—Transmit
LCLK
LDAT7–0
LACK (IN)
OUT
t
DLDCH
t
HLDCH
t
SLACH
t
HLACH
t
DLACLK
t
LCLKTWH
t
LCLKTWL
LAST BYTE
TRANSMITTED
FIRST BYTE
TRANSMITTED
1
NOTES
The t
SLACH
and t
HLACH
specifications apply only to the LACK falling edge. If these specifications are met,
LCLK would extend and the dotted LCLK falling edge would not occur as shown. The position of the
dotted falling edge can be calculated using the t
LCLKTWH
specification. t
LCLKTWH
Min should be used for t
SLACH
and t
LCLKTWH
Max for t
HLACH
.