Datasheet

ADSP-21469
Rev. 0 | Page 33 of 72 | June 2010
AMI Read
Use these specifications for asynchronous interfacing to memo-
ries. Note that timing for AMI_ACK, AMI_DATA, AMI_RD
,
AMI_WR
, and strobe timing parameters only apply to asyn-
chronous access mode.
Table 30. Memory Read
Parameter Min Max Unit
Timing Requirements
t
DAD
Address, Selects Delay to Data Valid
1, 2
W + t
DDR 2_ CLK
–5.4 ns
t
DRLD
AMI_RD Low to Data Valid
1
W – 3.2 ns
t
SDS
Data Setup to AMI_RD High 2.5 ns
t
HDRH
Data Hold from AMI_RD High
3, 4
0ns
t
DAAK
AMI_ACK Delay from Address, Selects
2, 5
t
DDR 2_ CLK
–9.5 + W ns
t
DSAK
AMI_ACK Delay from AMI_RD Low
4
W – 7.0 ns
Switching Characteristics
t
DRHA
Address Selects Hold After AMI_RD High RH + 0.20 ns
t
DARL
Address Selects to AMI_RD Low
2
t
DDR 2_ CLK
– 3.8 ns
t
RW
AMI_RD Pulse Width W – 1.4 ns
t
RWR
AMI_RD High to AMI_RD Low HI + t
DDR 2_ CLK
– 1 ns
W = (number of wait states specified in AMICTLx register) × t
DDR 2_ CLK
.
RHC = (number of Read Hold Cycles specified in AMICTLx register) × t
DDR 2_ CLK
Where PREDIS = 0
HI = RHC: Read to Read from same bank
HI = RHC + IC: Read to Read from different bank
HI = RHC + Max (IC, (4 × t
DDR2_CLK
)): Read to Write from same or different bank
Where PREDIS = 1
HI = RHC + Max(IC, (4 × t
DDR2_CLK
)): Read to Write from same or different bank
HI = RHC + (3 × tDDR2_CLK): Read to Read from same bank
HI = RHC + Max(IC, (3 × t
DDR2_CLK
)): Read to Read from different bank
IC = (number of idle cycles specified in AMICTLx register) × t
DDR2_CLK
H = (number of hold cycles specified in AMICTLx register) × t
DDR2_CLK
1
Data delay/setup: System must meet t
DAD
, t
DRLD
, or t
SDS.
2
The falling edge of AMI_MSx, is referenced.
3
Note that timing for AMI_ACK, AMI_DATA, AMI_RD, AMI_WR, and strobe timing parameters only apply to asynchronous access mode.
4
Data hold: User must meet t
HDRH
in asynchronous access mode. See Test Conditions on Page 58 for the calculation of hold times given capacitive and dc loads.
5
AMI_ACK delay/setup: User must meet t
DAAK
, or t
DSAK
, for deassertion of AMI_ACK (low).