Datasheet

Rev. 0 | Page 18 of 72 | June 2010
ADSP-21469
ELECTRICAL CHARACTERISTICS
450 MHz 400 MHz
UnitParameter
1
Description Test Conditions Min Max Min Max
V
OH
2
High Level Output
Voltage
@ V
DD _ EXT
= Min, I
OH
= –1.0 mA
3
2.4 2.4 V
V
OL
2
Low Level Output
Voltage
@ V
DD _ EXT
= Min, I
OL
= 1.0 mA
3
0.4 0.4 V
V
OH _ DDR 2
High Level Output
Voltage for DDR2
@ V
DD _ DDR
= Min, IOH = –13.4
mA
1.4 1.4 V
V
OL _ DDR 2
Low Level Output
Voltage for DDR2
@ V
DD _ DDR
= Min, IOL = 13.4 mA 0.29 0.29 V
I
IH
4, 5
High Level Input
Current
@ V
DD _ EXT
= Max, V
IN
= V
DD _ EXT
Max
10 10 μA
I
IL
4, 6
Low Level Input
Current
@ V
DD _ EXT
= Max, V
IN
= 0 V 10 10 μA
I
ILPU
5
Low Level Input
Current Pull-up
@ V
DD _ EXT
= Max, V
IN
= 0 V 200 200 μA
I
IHPD
6
High Level Input
Current Pull-down
@ V
DD _ EXT
= Max, V
IN
= V
DD _ EXT
Max
200 200 μA
I
OZH
7, 8
Three-State Leakage
Current
@ V
DD _ EXT
/V
DD _ DDR
= Max,
V
IN
= V
DD _ EXT
/V
DD _ DDR
Max
10 10 μA
I
OZL
7, 9
Three-State Leakage
Current
@ V
DD _ EXT
/V
DD _ DDR
= Max,
V
IN
= 0 V
10 10 μA
I
OZLPU
8
Three-State Leakage
Current Pull-up
@ V
DD _ EXT
= Max, V
IN
= 0 V 200 200 μA
I
OZHPD
9
Three-State Leakage
Current Pull-down
@ V
DD _ EXT
= Max,
V
IN
= V
DD _ EXT
Max
200 200 μA
I
DD - INTYP
10, 11
Supply Current
(Internal)
f
CCLK
> 0 MHz Table 12 +
Table 13 × ASF
Table 12 +
Table 13 × ASF
mA
I
DD _ A
12
Supply Current
(Analog)
V
DD _ A
= Max 10 10 mA
C
IN
13, 14
Input Capacitance T
CASE
= 25°C55pF
1
Specifications subject to change without notice.
2
Applies to output and bidirectional pins: AMI_ADDR23-0, AMI_DATA7-0, AMI_RD, AMI_WR, FLAG3–0, DAI_Px, DPI_Px, EMU, TDO.
3
See Output Drive Currents on Page 58 for typical drive current capabilities.
4
Applies to input pins: BOOTCFGx, CLKCFGx, TCK, RESET, CLKIN.
5
Applies to input pins with internal pull-ups: TRST, TMS, TDI.
6
Applies to input pins with internal pull-downs: MLBCLK
7
Applies to three-statable pins: all DDR2 pins.
8
Applies to three-statable pins with pull-ups: DAI_Px, DPI_Px, EMU.
9
Applies to three-statable pins with pull-downs: MLBDAT, MLBSIG, MLBDO, MLBSO, LDAT07-0, LDAT17-0, LCLK0, LCLK1, LACK0, LACK1.
10
Typical internal current data reflects nominal operating conditions.
11
See Engineer-to-Engineer Note “Estimating Power Dissipation for ADSP-2146x SHARC Processors” for further information.
12
Characterized but not tested.
13
Applies to all signal pins.
14
Guaranteed, but not tested.