Datasheet

Rev. D | Page 46 of 56 | April 2013
ADSP-21371/ADSP-21375
Universal Asynchronous Receiver-Transmitter
(UART) Port—Receive and Transmit Timing
Figure 33 describes UART port receive and transmit operations.
The maximum baud rate is PCLK/16 where PCLK = 1/t
PCLK
. As
shown in Figure 33 there is some latency between the
generation of internal UART interrupts and the external data
operations. These latencies are negligible at the data transmis-
sion rates for the UART.
Table 39. UART Port
Parameter Min Max Unit
Timing Requirement
t
TXD
1
Incoming Data Pulse Width 16t
PCLK
–1 ns
Switching Characteristic
t
RXD
1
Incoming Data Pulse Width 16t
PCLK
–1 ns
1
UART signals TXD and RXD are routed through DPI P14-1 pins using the SRU.
Figure 33. UART Port—Receive and Transmit Timing
DPI_P14–1
[RxD]
DPI_P14–1
[TxD]
DATA (5–8)
DATA (5–8)
INTERNAL
UART RECEIVE
INTERRUPT
INTERNAL
UART TRANSMIT
INTERRUPT
UART RECEIVE BIT SET BY DATA STOP;
CLEARED BY FIFO READ
UART TRANSMIT BIT SET BY PROGRAM;
CLEARED BY WRITE TO TRANSMIT
START
STOP
STOP (1–2)
t
RXD
t
TXD
RECEIVE
TRANSMIT