Datasheet

ADSP-21371/ADSP-21375
Rev. D | Page 17 of 56 | April 2013
ELECTRICAL CHARACTERISTICS
1.0 V, 200 MHz 1.2 V, 266 MHz
Parameter
1
Description Test Conditions Min Typ Max Min Typ Max Unit
V
OH
2
High Level Output Voltage @ V
DDEXT
= Min, I
OH
= –1.0 mA
3
2.4 2.4 V
V
OL
2
Low Level Output Voltage @ V
DDEXT
= Min, I
OL
= 1.0 mA
3
0.4 0.4 V
I
IH
4, 5
High Level Input Current @ V
DDEXT
= Max, V
IN
= V
DDEXT
max 10 10 μA
I
IL
4
Low Level Input Current @ V
DDEXT
= Max, V
IN
= 0 V 10 10 μA
I
ILPU
5
Low Level Input Current
Pull-up
@ V
DDEXT
= Max, V
IN
= 0 V 200 200 μA
I
OZH
6, 7
Three-State Leakage Current @ V
DDEXT
= Max, V
IN
= V
DDEXT
Max 10 10 μA
I
OZL
6
Three-State Leakage Current @ V
DDEXT
= Max, V
IN
= 0 V 10 10 μA
I
OZLPU
7
Three-State Leakage Current
Pull-up
@ V
DDEXT
= Max, V
IN
= 0 V 200 200 μA
I
DD - INTYP
8, 9
Supply Current (Internal) 1.0V, 200 MHz: t
CCLK
= 5.00 ns,
V
DDINT
= 1.0 V, 25ºC
1.2V, 266 MHz: t
CCLK
= 3.75 ns,
V
DDINT
= 1.2 V, 25ºC
400
600
mA
mA
C
IN
10, 11
Input Capacitance f
IN
= 1 MHz, T
CASE
= 25°C, V
IN
= 1.2 V 4.7 4.7 pF
1
Specifications subject to change without notice.
2
Applies to output and bidirectional pins: ADDR23–0, DATA31–0 (DATA15–0 on ADSP-21375), RD, WR, FLAG3–0, DAI_Px, DPI_Px, EMU, TDO, SDRAS, SDCAS, SDWE,
SDCKE, SDA10, and SDCLK.
3
See Output Drive Currents on Page 49 for typical drive current capabilities.
4
Applies to input pins: BOOT_CFGx, CLKCFGx, TCK, RESET, CLKIN.
5
Applies to input pins with 22.5 k internal pull-ups: TRST, TMS, TDI.
6
Applies to three-statable pins: FLAG3–0.
7
Applies to three-statable pins with 22.5 k pull-ups: DAI_Px, DPI_Px, EMU.
8
Typical internal current data reflects nominal operating conditions.
9
See Engineer-to-Engineer Note “Estimating Power Dissipation for ADSP-2137x SHARC Processors” (EE-318) for further information.
10
Applies to all signal pins.
11
Guaranteed, but not tested.