Datasheet

Rev. F | Page 38 of 64 | October 2013
ADSP-21367/ADSP-21368/ADSP-21369
Figure 25. External Late Frame Sync
1
1
This figure reflects changes made to support left-justified sample pair mode.
DRIVE SAMPLE
EXTERNAL RECEIVE FS WITH MCE = 1, MFD = 0
2ND BIT
DAI_P20–1
(SCLK)
DAI_P20–1
(FS)
DAI_P20–1
(DATA CHANNEL
A/B)
1ST BIT
DRIVE
t
DDTE/I
t
HDTE/I
t
DDTLFSE
t
DDTENFS
t
SFSE/I
DRIVE SAMPLE
LATE EXTERNAL TRANSMIT FS
2ND BIT
DAI_P20–1
(SCLK)
DAI_P20–1
(FS)
DAI_P20–1
(DATA CHANNEL
A/B)
1ST BIT
DRIVE
t
DDTE/I
t
HDTE/I
t
DDTLFSE
t
DDTENFS
t
SFSE/I
t
HFSE/I
t
HFSE/I