Datasheet

ADSP-21367/ADSP-21368/ADSP-21369
Rev. F | Page 25 of 64 | October 2013
Timer WDTH_CAP Timing
The following specification applies to Timer0, Timer1, and
Timer2 in WDTH_CAP (pulse width count and capture) mode.
Timer signals are routed to the DPI_P14–1 pins through the
DPI SRU. Therefore, the specification provided in Table 18 is
valid at the DPI_P14–1 pins.
Pin to Pin Direct Routing (DAI and DPI)
For direct pin connections only (for example, DAI_PB01_I to
DAI_PB02_O).
Table 18. Timer Width Capture Timing
Parameter Min Max Unit
Switching Characteristic
t
PWI
Timer Pulse Width 2 × t
PCLK
2 × (2
31
– 1) × t
PCLK
ns
Figure 13. Timer Width Capture Timing
TIMER
CAPTURE
INPUTS
t
PWI
Table 19. DAI/DPI Pin to Pin Routing
Parameter Min Max Unit
Timing Requirement
t
DPIO
Delay DAI/DPI Pin Input Valid to DAI/DPI Output Valid 1.5 12 ns
Figure 14. DAI/DPI Pin to Pin Direct Routing
DAI_Pn
DPI_Pn
DAI_Pm
DPI_Pm
t
DPIO