Datasheet

Rev. F | Page 24 of 64 | October 2013
ADSP-21367/ADSP-21368/ADSP-21369
Core Timer
The following timing specification applies to FLAG3 when it is
configured as the core timer (TMREXP).
Timer PWM_OUT Cycle Timing
The following timing specification applies to Timer0, Timer1,
and Timer2 in PWM_OUT (pulse-width modulation) mode.
Timer signals are routed to the DPI_P14–1 pins through the
DPI SRU. Therefore, the timing specifications provided below
are valid at the DPI_P14–1 pins.
Table 16. Core Timer
Parameter Min Max Unit
Switching Characteristic
t
WCTIM
TMREXP Pulse Width 4 × t
PCLK
– 1 ns
Figure 11. Core Timer
FLAG3
(TMREXP)
t
WCTIM
Table 17. Timer PWM_OUT Timing
Parameter Min Max Unit
Switching Characteristic
t
PWMO
Timer Pulse Width Output 2 × t
PCLK
– 1.2 2 × (2
31
– 1) × t
PCLK
ns
Figure 12. Timer PWM_OUT Timing
PWM
OUTPUTS
t
PWMO