Datasheet

ADSP-21261
Rev. 0 | Page 37 of 44 | March 2006
OUTPUT DRIVE CURRENTS
Figure 28 shows typical I-V characteristics for the output driv-
ers of the ADSP-21261. The curves represent the current drive
capability of the output drivers as a function of output voltage.
TEST CONDITIONS
The ac signal specifications (timing parameters) appear in
Table 9 on Page 18 through Table 31 on Page 36. These include
output disable time, output enable time, and capacitive loading.
Timing is measured on signals when they cross the 1.5 V level as
described in Figure 30. All delays (in nanoseconds) are mea-
sured between the point that the first signal reaches 1.5 V and
the point that the second signal reaches 1.5 V.
CAPACITIVE LOADING
Output delays and holds are based on standard capacitive loads:
30 pF on all pins (see Figure 29). Figure 33 shows graphically
how output delays and holds vary with load capacitance. The
graphs of Figure 31, Figure 32, and Figure 33 may not be linear
outside the ranges shown for Typical Output Delay vs. Load
Capacitance and Typical Output Rise Time (20%–80%, V =
Min) vs. Load Capacitance.
Figure 28. ADSP-21261 Typical Drive
Figure 29. Equivalent Device Loading for AC Measurements
(Includes All Fixtures)
Figure 30. Voltage Reference Levels for AC Measurements
SWEEP (V
DDEXT
) VOL TAGE (V )
–20
03.50.5 1.0 1.5 2 2.5 3.0
0
–40
–30
20
40
–10
S
O
U
R
C
E
(
V
D
D
E
X
T
)
C
U
R
R
E
N
T
(
m
A
)
V
OL
3.11V, 70°C
3.3V, 25°C
3.47V, 0°C
V
OH
30
10
3.11V, 70°C
3.3V, 25°C
3.47V, 0°C
1.5V
30pF
TO
OUTPUT
PIN
50⍀
INPUT
OR
OUTPUT
1.5V 1.5V
Figure 31. Typical Output Rise/Fall Time
(20% to 80%, V
DDEXT
= Max)
Figure 32. Typical Output Rise/Fall Time
(20% to 80%, V
DDEXT
= Min)
LOAD CAPACITANCE (pF)
8
0
0 12040 100
12
4
2
10
6
R
I
S
E
A
N
D
F
A
L
L
T
I
M
E
S
(
n
s
)
y = 0.0722x + 1.4042
806020
RISE
FALL
y = 0.0904x + 1.9426
LOAD CAPACITANCE (pF)
12
012020 40 60 80 100
10
8
6
4
R
I
S
E
A
N
D
F
A
L
L
T
I
M
E
S
(
n
s
)
2
0
y = 0.0915x + 2.2207
y = 0.0728x +1.6336
RISE
FALL