Datasheet

ADSP-21161N
Rev. C | Page 9 of 60 | January 2013
(for example 10k ohm). These pins must be driven low with a
strong enough drive strength (10–50 ohms) to overcome the
SHARC keeper latches present on these pins. If the drive
strength provided is not strong enough, data access failures can
occur.
For single processor SHARC systems using this host access fea-
ture, address pins ADDR17, ADDR18, ADDR19, and ADDR20
may be tied low (for example through a 10k ohm resistor),
driven low by a buffer/driver, or left floating. Any of these
options is sufficient.
General-Purpose I/O Ports
The ADSP-21161N also contains 12 programmable, general
purpose I/O pins that can function as either input or output. As
output, these pins can signal peripheral devices; as input, these
pins can provide the test for conditional branching.
Program Booting
The internal memory of the ADSP-21161N can be booted at
system power-up from either an 8-bit EPROM, a host processor,
the SPI interface, or through one of the link ports. Selection of
the boot source is controlled by the Boot Memory Select (BMS
),
EBOOT (EPROM Boot), and Link/Host Boot (LBOOT) pins.
8-, 16-, or 32-bit host processors can also be used for booting.
Phase-Locked Loop and Crystal Double Enable
The ADSP-21161N uses an on-chip phase-locked loop (PLL) to
generate the internal clock for the core. The CLK_CFG1–0 pins
are used to select ratios of 2:1, 3:1, and 4:1. In addition to the
PLL ratios, the CLKDBL
pin can be used for more clock ratio
options. The (1/2 CLKIN) rate set by the CLKDBL
pin determines the rate of the PLL input clock and the rate at
which the external port operates. With the combination of
CLK_CFG1–0 and CLKDBL
, ratios of 2:1, 3:1, 4:1, 6:1, and 8:1
between the core and CLKIN are supported. See also Figure 8
on Page 20.
Power Supplies
The ADSP-21161N has separate power supply connections for
the analog (AV
DD
/AGND), internal (V
DDINT
), and external
(V
DDEXT
) power supplies. The internal and analog supplies must
meet the 1.8 V requirement. The external supply must meet the
3.3 V requirement. All external supply pins must be connected
to the same supply.
Note that the analog supply (AV
DD
) powers the ADSP-21161N’s
clock generator PLL. To produce a stable clock, provide an
external circuit to filter the power input to the AV
DD
pin. Place
the filter as close as possible to the pin. The AV
DD
filter circuit
shown in Figure 6 must be added for each ADSP-21161N in the
multiprocessor system. To prevent noise coupling, use a wide
trace for the analog ground (AGND) signal and install a decou-
pling capacitor as close as possible to the pin.
DEVELOPMENT TOOLS
Analog Devices supports its processors with a complete line of
software and hardware development tools, including integrated
development environments (which include CrossCore
®
Embed-
ded Studio and/or VisualDSP++
®
), evaluation products,
emulators, and a wide variety of software add-ins.
Integrated Development Environments (IDEs)
For C/C++ software writing and editing, code generation, and
debug support, Analog Devices offers two IDEs.
The newest IDE, CrossCore Embedded Studio, is based on the
Eclipse
TM
framework. Supporting most Analog Devices proces-
sor families, it is the IDE of choice for future processors,
including multicore devices. CrossCore Embedded Studio
seamlessly integrates available software add-ins to support real
time operating systems, file systems, TCP/IP stacks, USB stacks,
algorithmic software modules, and evaluation hardware board
support packages. For more information visit
www.analog.com/cces.
The other Analog Devices IDE, VisualDSP++, supports proces-
sor families introduced prior to the release of CrossCore
Embedded Studio. This IDE includes the Analog Devices VDK
real time operating system and an open source TCP/IP stack.
For more information visit www.analog.com/visualdsp. Note
that VisualDSP++ will not support future Analog Devices
processors.
EZ-KIT Lite Evaluation Board
For processor evaluation, Analog Devices provides wide range
of EZ-KIT Lite
®
evaluation boards. Including the processor and
key peripherals, the evaluation board also supports on-chip
emulation capabilities and other evaluation and development
features. Also available are various EZ-Extenders
®
, which are
daughter cards delivering additional specialized functionality,
including audio and video processing. For more information
visit www.analog.com and search on “ezkit” or “ezextender”.
EZ-KIT Lite Evaluation Kits
For a cost-effective way to learn more about developing with
Analog Devices processors, Analog Devices offer a range of EZ-
KIT Lite evaluation kits. Each evaluation kit includes an EZ-KIT
Lite evaluation board, directions for downloading an evaluation
version of the available IDE(s), a USB cable, and a power supply.
The USB controller on the EZ-KIT Lite board connects to the
USB port of the user’s PC, enabling the chosen IDE evaluation
suite to emulate the on-board processor in-circuit. This permits
the customer to download, execute, and debug programs for the
EZ-KIT Lite system. It also supports in-circuit programming of
the on-board Flash device to store user-specific boot code,
enabling standalone operation. With the full version of Cross-
Figure 6. Analog Power (AV
DD
) Filter Circuit
10 ⍀
V
DDINT
0.1␮F
0.01␮F
AGND
AV
DD