Datasheet

–31–REV. 0
ADSP-21160N
Figure 20. Three-State Timing—Bus Master, Bus Slave
CLKIN
SBTS
ACK
MEMORY
INTERFACE
HBG
MEMORY INTERFACE = ADDRESS, RDx, WRx, MSx,PAGE,DMAGx. BMS (IN EPROM BOOT MODE)
CLKOUT
DATA
MEMORY
INTERFACE
t
MENHBG
t
MITRA,
t
MITRS,
t
MITRHG
t
STSCK
t
HTSCK
t
DATTR
t
DATEN
t
ACKTR
t
ACKEN
t
CDCTR
t
CDCEN
t
MIENA,
t
MIENS,
t
MIENHG
t
ATRHBG
t
STRHBG
t
PTRHBG
t
BTRHBG