Datasheet

–21–REV. 0
ADSP-21160N
Memory Read—Bus Master
See Table 10 and Figure 13. Use these specifications for asyn-
chronous interfacing to memories (and memory-mapped
peripherals) without reference to CLKIN. These specifications
apply when the ADSP-21160N is the bus master accessing
external memory space in asynchronous access mode. Note that
timing for ACK, DATA,
RDx , WRx , and DMAGx strobe timing
parameters only applies to asynchronous access mode.
Table 10. Memory Read—Bus Master
Parameter Min Max Unit
Timing Requirements
t
DAD
Address, CIF, Selects Delay to Data Valid
1, 2
t
CK
– 0.25t
CCLK
–11+W ns
t
DRLD
RDx Low to Data Valid
1
t
CK
–0.5t
CCLK
+W ns
t
HDA
Data Hold from Address, Selects
3
0ns
t
SDS
Data Setup to RDx High
1
8ns
t
HDRH
Data Hold from RDx High
3
1ns
t
DAAK
ACK Delay from Address, Selects
2, 4
t
CK
–0.5t
CCLK
–12+W ns
t
DSAK
ACK Delay from RDx Low
4
t
CK
–0.75t
CCLK
–11+W ns
t
SAKC
ACK Setup to CLKIN
4
0.5t
CCLK
+3 ns
t
HAKC
ACK Hold After CLKIN 1 ns
Switching Characteristics
t
DRHA
Address, CIF, Selects Hold After RDx High 0.25t
CCLK
–1+H ns
t
DARL
Address, CIF, Selects to RDx Low
2
0.25t
CCLK
–3 ns
t
RW
RDx Pulsewidth t
CK
–0.5t
CCLK
–1+W ns
t
RWR
RDx High to WRx, RDx, DMAGx Low 0.5t
CCLK
–1+HI ns
W = (number of wait states specified in WAIT register)  t
CK
.
HI = t
CK
(if an address hold cycle or bus idle cycle occurs, as specified in WAIT register; otherwise HI = 0).
H = t
CK
(if an address hold cycle occurs as specified in WAIT register; otherwise H = 0).
1
Data Delay/Setup: User must meet t
DAD
, t
DRLD
, or t
SDS
.
2
The falling edge of MSx, BMS is referenced.
3
Data Hold: User must meet t
HDA
or t
HDRH
in asynchronous access mode. See Example System Hold Time Calculation on Page 41 for the calculation of
hold times given capacitive and dc loads.
4
ACK Delay/Setup: User must meet t
DAAK
, t
DSAK
, or t
SAKC
for deassertion of ACK (Low), all three specifications must be met for assertion of ACK (High).
Figure 13. Memory Read—Bus Master
WRx
ACK
DATA
RDx
t
DARL
t
RW
t
DAD
t
DAAK
t
HDRH
t
HDA
t
RWR
t
DRLD
t
DRHA
t
DSAK
t
SDS
t
SAKC
t
HAKC
CLKIN
DMAGx
ADDRESS
MSx, CIF
BMS