Datasheet

ADSP-21160N
–10– REV. 0
Tie or pull unused inputs to V
DD
or GND, except for the
following:
ADDR310, DATA630, PAGE, BRST, CLKOUT
(ID20 = 00x) (Note: These pins have a logic-level hold
circuit enabled on the ADSP-21160N DSP with ID20
= 00x.)
PA, ACK, MS30, RDx, WRx, CIF, DMARx, DMAGx
(ID20 = 00x) (Note: These pins have a pull-up enabled
on the ADSP-21160N DSP with ID20 = 00x.)
LxCLK, LxACK, LxDAT70 (LxPDRDE = 0) (Note:
See Link Port Buffer Control Register Bit definitions in
the ADSP-21160 DSP Hardware Reference.)
DTx, DRx, TCLKx, RCLKx, EMU, TMS, TRST, TDI
(Note: These pins have a pull-up.)
The following symbols appear in the Type column of Table 2:
A = Asynchronous, G = Ground, I = Input, O = Output,
P=Power Supply, S=Synchronous, (A/D)=Active Drive,
(O/D) = Open Drain, and T = Three-State (when
SBTS
is
asserted, or when the ADSP-21160N is a bus slave).
Table 2. Pin Function Descriptions
Pin Type Function
ADDR31–0 I/O/T External Bus Address. The ADSP-21160N outputs addresses for external memory and
peripherals on these pins. In a multiprocessor system, the bus master outputs addresses
for read/writes of the internal memory or IOP registers of other ADSP-21160Ns. The
ADSP-21160N inputs addresses when a host processor or multiprocessing bus master
is reading or writing its internal memory or IOP registers. A keeper latch on the DSP’s
ADDR31–0 pins maintains the input at the level it was last driven (only enabled on the
ADSP-21160N with ID2–0 = 00x).
DATA63–0 I/O/T External Bus Data. The ADSP-21160N inputs and outputs data and instructions on
these pins. Pull-up resistors on unused DATA pins are not necessary. A keeper latch on
the DSP’s DATA63-0 pins maintains the input at the level it was last driven (only enabled
on the ADSP-21160N with ID2–0 = 00x).
MS3–0
O/T Memory Select Lines. These outputs are asserted (low) as chip selects for the corre-
spo nding banks of e xter nal memor y. Memor y bank size mu st be defined i n the SYSCON
control register. The MS3–0 outputs are decoded memory address lines. In asyn-
chronous access mode, the MS3–0 outputs transition with the other address outputs.
In synchronous access modes, the MS3–0 outputs assert with the other address lines;
however, they deassert after the first CLKIN cycle in which ACK is sampled asserted.
MS3–0 has a 20 k internal pull-up resistor that is enabled on the ADSP-21160N with
ID2–0 = 00x.
RDL
I/O/T Memory Read Low Strobe. RDL is asserted whenever ADSP-21160N reads from the
low word of external memory or from the internal memory of other ADSP-21160Ns.
External devices, including other ADSP-21160Ns, must assert RDL for reading from
the low word of ADSP-21160N internal memory. In a multiprocessing system, RDL is
driven by the bus master. RDL has a 20 k internal pull-up resistor that is enabled on
the ADSP-21160N with ID2–0 = 00x.
RDH
I/O/T Memory Read High Strobe. RDH is asserted whenever ADSP-21160N reads from the
high word of external memory or from the internal memory of other ADSP-21160Ns.
External devices, including other ADSP-21160Ns, must assert RDH for reading from
the high word of ADSP-21160N internal memory. In a multiprocessing system, RDH
is driven by the bus master. RDH has a 20 k internal pull-up resistor that is enabled
on the ADSP-21160N with ID2–0 = 00x.
WRL
I/O/T Memory Write Low Strobe. WRL is asserted when ADSP-21160N writes to the low
word of external memory or internal memory of other ADSP-21160Ns. External devices
must assert WRL for writing to ADSP-21160N’s low word of internal memory. In a
multiprocessing system, WRL is driven by the bus master. WRL has a 20 k internal
pull-up resistor that is enabled on the ADSP-21160N with ID2–0 = 00x.
WRH
I/O/T Memory Write High Strobe. WRH is asserted when ADSP-21160N writes to the high
word of external memory or internal memory of other ADSP-21160Ns. External devices
must assert WRH for writing to ADSP-21160N’s high word of internal memory. In a
multiprocessing system, WRH is driven by the bus master. WRH has a 20 k internal
pull-up resistor that is enabled on the ADSP-21160N with ID2–0 = 00x.