Datasheet

35REV. 0
ADSP-21160M
Table 19. Link PortsReceive
Parameter Min Max Unit
Timing Requirements:
t
SLDCL
Data Setup Before LCLK Low 2.5 ns
t
HLDCL
Data Hold After LCLK Low 2.5 ns
t
LCLKIW
LCLK Period t
LCLK
ns
t
LCLKRWL
LCLK Width Low 6.0 ns
t
LCLKRWH
LCLK Width High 6.0 ns
Switching Characteristics:
t
DLALC
LACK Low Delay After LCLK High
1
12 17 ns
1
LACK goes low with t
DLALC
relative to rise of LCLK after first nibble, but doesnt go low if the receivers link buffer is not about to fill.
Figure 24. Link PortsReceive
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