Datasheet

ADSP-21160M
–12– REV. 0
TCK I Test Clock (JTAG). Provides a clock for JTAG boundary scan.
TMS I/S Test Mode Select (JTAG). Used to control the test state machine. TMS has a 20 k
Ω
internal pull-up resistor.
TDI I/S Test Data Input (JTAG). Provides serial data for the boundary scan logic. TDI has a
20 k
Ω
internal pull-up resistor.
TDO O Test Data Output (JTAG). Serial scan output of the boundary scan path.
TRST
I/A Test Reset (JTAG). Resets the test state machine. TRST must be asserted (pulsed low)
after power-up or held low for proper operation of the ADSP-21160M. TRST
has a
20 k
Ω
internal pull-up resistor.
EMU
O (O/D) Emulation Status. Must be connected to the ADSP-21160M emulator target board
connector only. EMU has a 50 k
Ω
internal pull-up resistor.
CIF
O/T Core Instruction Fetch. Signal is active low when an external instruction fetch is
performed. Driven by bus master only. Three-state when host is bus master.
V
DDINT
P Core Power Supply. Nominally 2.5 V dc and supplies the DSP’s core processor
(40 pins).
V
DDEXT
P I/O Power Supply. Nominally 3.3 V dc (46 pins).
AV
DD
P Analog Power Supply. Nominally 2.5 V dc and supplies the DSP’s internal PLL (clock
generator). This pin has the same specifications as V
DDINT
, except that added filtering
circuitry is required. For more information, see Power Supplies on page 6.
AGND G Analog Power Supply Return.
GND G Power Supply Return. (83 pins)
NC Do Not Connect. Reserved pins that must be left open and unconnected (5 pins).
Table 3. Boot Mode Selection
EBOOT LBOOT BMS
Booting Mode
1 0 Output EPROM (Connect BMS to EPROM chip select.)
001 (Input)Host Processor
0 1 1 (Input) Link Port
0 0 0 (Input) No Booting. Processor executes from external memory.
010 (Input)Reserved
1 1 x (Input) Reserved
Table 2. Pin Function Descriptions (Continued)
Pin Type Function