Datasheet

REV. C
ADSP-21065L
–31–
t
HCSDK
t
SCSDK
t
SSDKC1
t
SSDKC2
t
SDAEN
t
SDATR
t
SDCTR
t
HCADSDK
t
HCADSDK
t
SDTRSDK
t
DCADSDK
t
SDCEN
t
SDSDK
t
DCADSDK
t
SDENSDK
t
HDSDK
t
SDKL
t
SDKH
t
SDK
t
DSDK1
t
DSDK2
CLKIN
SDCLK
DATA
(IN)
DATA
(OUT)
CMND
1
ADDR
(OUT)
CMND
1
(OUT)
ADDR
(OUT)
SDCLK
(IN)
CMND
2
(IN)
CLKIN
NOTES
1
COMMAND = SDCKE, MS
X
, RAS, CAS, SDWE, DQM , AND SDA10.
2
SDRAM CONTROLLER ADDS ONE SDRAM CLK THREE-STATED CYCLE DELAY ( t
CK
/2) ON A READ FOLLOWED BY A WRITE.
Figure 19. SDRAM Interface