Datasheet

REV. C
ADSP-21065L
–29–
CLKIN
t
SDRLC
DMARx
DATA (FROM
ADSP-2106x TO
EXTERNAL DEVICE)
DATA (FROM
EXTERNAL DEVICE
TO ADSP-2106x)
RD
(EXTERNAL
MEMORY TO
EXTERNAL DEVICE)
WR
(EXTERNAL DEVICE
TO EXTERNAL
MEMORY)
t
WDR
t
SDRHC
t
DMARH
t
DMARLL
t
HDGC
t
WDGH
t
DDGL
t
WDGL
DMAGx
t
VDATDGH
t
DATDRH
t
DATRDGH
t
HDATIDG
t
DGWRL
t
DGWRH
t
DGWRR
t
DGRDL
t
DRDGH
t
DGRDR
t
SDATDGL
*“MEMORY READ – BUS MASTER,” “MEMORY WRITE – BUS MASTER,” AND “SYNCHRONOUS READ/WRITE – BUS MASTER”
TIMING SPECIFICATIONS FOR ADDR
23–0
, RD , WR , SW , MS
3–0
, AND ACK ALSO APPLY HERE.
TRANSFERS BETWEEN ADSP-2106x INTERNAL MEMORY AND EXTERNAL DEVICE
TRANSFERS BETWEEN EXTERNAL DEVICE AND EXTERNAL MEMORY (EXTERNAL HANDSHAKE MODE)
t
DDGHA
ADDRESS
SW , MS x
t
DADGH
*
Figure 18. DMA Handshake Timing