REV. C
ADSP-21065L
–27–
CLKIN
SBTS
ACK
MEMORY
INTERFACE
t
MENHBG
t
MTRHBG
HBG
MEMORY INTERFACE = ADDRESS, RD, WR, MSx, SW, DMAGx. BMS (IN EPROM BOOT MODE)
t
MITRA,
t
MITRS,
t
MITRHG
t
STSCK
t
HTSCK
t
DATTR
t
DATEN
t
ACKTR
t
ACKEN
DATA
MEMORY
INTERFACE
t
MIENA,
t
MIENS,
t
MIENHG
Figure 17. Three-State Timing
