Datasheet

ADSP-21060/ADSP-21060L/ADSP-21062/ADSP-21062L/ADSP-21060C/ADSP-21060LC
Rev. F | Page 43 of 64 | March 2008
Table 32. Serial Ports—Internal Clock
Parameter Min Max Unit
Switching Characteristics
t
DFSI
TFS Delay After TCLK (Internally Generated TFS)
1
4.5 ns
t
HOFSI
TFS Hold After TCLK (Internally Generated TFS)
1
–1.5 ns
t
DDTI
Transmit Data Delay After TCLK
1
7.5 ns
t
HDTI
Transmit Data Hold After TCLK
1
0ns
t
SCLKIW
TCLK/RCLK Width
2
0.5t
SCLK
–2.5 0.5t
SCLK
+2.5 ns
1
Referenced to drive edge.
2
For ADSP-21060L/ADSP-21060C, specification is 0.5
TSCLK
– 2 ns min, 0.5t
SCLK
+ 2 ns max.
Table 33. Serial Ports—Enable and Three-State
Parameter Min Max Unit
Switching Characteristics
t
DDTEN
Data Enable from External TCLK
1, 2
4ns
t
DDTTE
Data Disable from External TCLK
1, 3
10.5 ns
t
DDTIN
Data Enable from Internal TCLK
1
0ns
t
DDTTI
Data Disable from Internal TCLK
1, 4
3ns
t
DCLK
TCLK/RCLK Delay from CLKIN 22 + 3 DT/8 ns
t
DPTR
SPORT Disable After CLKIN 17 ns
1
Referenced to drive edge.
2
For ADSP-21060L/ADSP-21060C, specification is 3.5 ns min; for ADSP-21062 specification is 4.5 ns min.
3
For ADSP-21062L, specification is 16 ns max.
4
For ADSP-21062L, specification is 7.5 ns max.
Table 34. Serial Ports—GATED SCLK with External TFS (Mesh Multiprocessing)
1
Parameter Min Max Unit
Switching Characteristics
t
STFSCK
TFS Setup Before CLKIN 4 ns
t
HTFSCK
TFS Hold After CLKIN t
CK
/2 ns
1
Applies only to gated serial clock mode used for serial port system I/O in mesh multiprocessing systems.
Table 35. Serial Ports—External Late Frame Sync
Parameter Min Max Unit
Switching Characteristics
t
DDTLFSE
Data Delay from Late External TFS or External RFS with MCE = 1,
MFD = 0
1, 2
12 ns
t
DDTENFS
Data Enable from Late FS or MCE = 1, MFD = 0
1, 3
3.5 ns
1
MCE = 1, TFS enable and TFS valid follow t
DDTLFSE
and t
DDTENFS
.
2
For ADSP-21062/ADSP-21062L, specification is 12.75 ns max; for ADSP-21060L/ADSP-21060LC, specification is 12.8 ns max.
3
For ADSP-21060/ADSP-21060C, specification is 3 ns min.