2/40-Bit IEEE Floating-Point DSP Microprocessor Specification Sheet

ADSP-21020
REV. C
–15–
Flags
K/B/T Grade K/B/T Grade B/T Grade K Grade
20 MHz 25 MHz 30 MHz 33.3 MHz Frequency Dependency*
Parameter Min Max Min Max Min Max Min Max Min Max Unit
Timing Requirement:
1
t
SFI
FLAG3-0
IN
Setup before CLKIN High 19 16 14 13 19 + 5DT/16 ns
t
HFI
FLAG3-0
IN
Hold after CLKIN High 0 0 0 0 ns
t
DWRFI
FLAG3-0
IN
Delay from xRD, xWR Low 12 8 5 3 12 + 7DT/16 ns
t
HFIWR
FLAG3-0
IN
Hold after xRD, xWR 0000 ns
Deasserted
Switching Characteristic:
t
DFO
FLAG3-0
OUT
Delay from CLKIN High 24 24 24 24 ns
t
HFO
FLAG3-0
OUT
Hold after CLKIN High 5 5 5 5 ns
t
DFOE
CLKIN High to FLAG3-0
OUT
Enable 1 1 1 1 ns
t
DFOD
CLKIN High to FLAG3-0
OUT
Disable 24 24 24 24 ns
NOTES
*DT = t
CK
– 50 ns
1
Flag inputs meeting these setup and hold times will affect conditional operations in the next instruction cycle. See the Hardware Configuration chapter of the
ADSP-21020 User’s Manual for additional flag servicing information.
x = PM or DM.
CLKIN
t
DFOE
FLAG3-0
OUT
t
DFO
t
HFO
t
DFO
t
DFOD
FLAG OUTPUT
CLKIN
t
HFI
FLAG3-0
IN
FLAG INPUT
t
SFI
t
DWRFI
t
HFIWR
xRD, xWR
Figure 7. Flags