2/40-Bit IEEE Floating-Point DSP Microprocessor Specification Sheet

ADSP-21020
REV. C
–10–
Table V. Multiplier Compute Operations
Rn = Rx * Ry ( SSF ) Fn = Fx * Fy
MRF = Rx * Ry ( UUI
MRB = Rx * Ry (U U FR
Rn = MRF + Rx * Ry ( SSF ) Rn = MRF – Rx * Ry ( SSF )
Rn = MRB + Rx * Ry ( UUI Rn = MRB= Rx * Ry ( UUI
MRF = MRF + Rx * Ry ( U U FR MRF = MRF= Rx * Ry ( UUI FR
MRB = MRB MRB = MRB
Rn = SAT MRF (SI) Rn = RND MRF (SF)
Rn = SAT MRB (UI) Rn = RND MRB (UF)
MRF = SAT MRF (SF) MRF = RND MRF
MRB = SAT MRB (UF) MRB = RND MRB
MRF = 0
MRB
MRxF = Rn Rn = MRxF
MRxB Rn = MRxB
Rn, Rx, Ry R15–R0; register file location, fixed-point
Fn, Fx, Fy F15–F0; register file location, floating-point
MRxF MR2F, MR1F; MR0F; multiplier result accumulators, foreground
MRxB MR2B, MR1B, MR0B; multiplier result accumulators, background
( x-input y-input data format, )
( x-input y-input rounding
S Signed input
U Unsigned input
I Integer input(s)
F Fractional input(s)
FR Fractional inputs, Rounded output
(SF) Default format for 1-input operations
(SSF) Default format for 2-input operations
Table VI. Shifter and Shifter Immediate Compute Operations
Shifter Shifter Immediate
Rn = LSHIFT Rx BY Ry Rn = LSHIFT Rx BY<data8>
Rn = Rn OR LSHIFT Rx BY Ry Rn = Rn OR LSHIFT Rx BY<data8>
Rn = ASHIFT Rx BY Ry Rn = ASHIFT Rx BY<data8>
Rn = Rn OR ASHIFT Rx BY Ry Rn = Rn OR ASHIFT Rx BY<data8>
Rn = ROT Rx BY RY Rn = ROT Rx BY<data8>
Rn = BCLR Rx BY Ry Rn = BCLR Rx BY<data8>
Rn = BSET Rx BY Ry Rn = BSET Rx BY<data8>
Rn = BTGL Rx BY Ry Rn = BTGL Rx BY<data8>
BTST Rx BY Ry BTST Rx BY<data8>
Rn = FDEP Rx BY Ry Rn = FDEP Rx BY <bit6>: <len6>
Rn = Rn OR FDEP Rx BY Ry Rn = Rn OR FDEP Rx BY <bit6>:<1en6>
Rn = FDEP Rx BY Ry (SE) Rn = FDEP Rx BY <bit6>:<1en6> (SE)
Rn = Rn OR FDEP Rx BY Ry (SE) Rn = Rn OR FDEP Rx BY <bit6>:<1en6> (SE)
Rn = FEXT Rx BY Ry Rn = FEXT Rx BY <bit6>:<1en6>
Rn = FEXT Rx BY Ry (SE) Rn = FEXT Rx BY <bit6>:<1en6> (SE)
Rn = EXP Rx
Rn = EXP Rx (EX)
Rn = LEFTZ Rx
Rn = LEFTO Rx
Rn, Rx, Ry R15-R0; register file location, fixed-point
<bit6>:<len6> 6-bit immediate bit position and length values (for shifter immediate operations)