Datasheet

ADPD1080/ADPD1081 Data Sheet
Rev. B | Page 68 of 74
Address Data Bit
Default
Value Access Name Description
0x05: Time Slot A pulse output.
0x06: Time Slot B pulse output.
0x07: pulse output of both time slots.
0x0C: output data cycle occurred for Time Slot A.
0x0D: output data cycle occurred for Time Slot B.
0x0E: output data cycle occurred.
0x0F: toggles on every sample, which provides a signal at half the
sampling rate.
0x10: output = 0.
0x11: output = 1.
0x13: 32 kHz oscillator output.
Remaining settings are not supported.
[7:5] 0x0 R/W Reserved Write 0x0.
[4:0] 0x00 R/W GPIO0_ALT_CFG Alternate configuration for the GPIO0 pin.
0x0: GPIO0 is backward compatible to the ADPD103 INT pin
functionality.
0x1: interrupt function provided on GPIO0, as defined in Register 0x01.
0x2: asserts at the start of the first time slot, deasserts at end of last
time slot.
0x5: Time Slot A pulse output.
0x6: Time Slot B pulse output.
0x7: pulse output of both time slots.
0xC: output data cycle occurred for Time Slot A.
0xD: output data cycle occurred for Time Slot B.
0xE: output data cycle occurred.
0xF: toggles on every sample, which provides a signal at half the
sampling rate.
0x10: output = 0.
0x11: output = 1.
0x13: 32 kHz oscillator output.
Remaining settings are not supported.
0x0D [15:0] 0x0000 R/W SLAVE_ADDRESS_KEY Enable changing the I
2
C address using Register 0x09.
0x04AD: enable address change always.
0x44AD: enable address change if GPIO0 is high.
0x84AD: enable address change if GPIO1 is high.
0xC4AD: enable address change if both GPIO0 and GPIO1 are high.
0x0F [15:1] 0x0000 R Reserved Write 0x0000.
0 0x0 R/W SW_RESET Software reset. Write 0x1 to reset the devices. This bit clears itself
after a reset. For I
2
C communications, this command returns an
acknowledge and the device subsequently returns to standby mode
with all registers reset to the default state.
0x10 [15:2] 0x0000 R/W Reserved Write 0x000.
[1:0] 0x0 R/W Mode Determines the operating mode of the ADPD1080/ADPD1081.
0x0: standby.
0x1: program.
0x2: normal operation.
0x11 [15:14] 0x0 R/W Reserved Reserved.
13 0x0 R/W RDOUT_MODE Readback data mode for extended data registers.
0x0: block sum of N samples.
0x1: block average of N samples.
12 0x1 R/W FIFO_OVRN_PREVENT 0x0: wrap around FIFO, overwriting old data with new.
0x1: new data if FIFO is not full (recommended setting).
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