Datasheet

Data Sheet ADPD1080/ADPD1081
Rev. B | Page 53 of 74
Monitoring Ambient Light Levels in Float LED Mode
In real-world applications, it is common for the ambient light
levels to change constantly. When using float LED mode,
increasing the amount of ambient light can approach levels
where the ambient light uses an unacceptable amount of
dynamic range of the charge that can be stored on the photodiode
capacitance. For this reason, it is required that the ambient light
level is monitored so that configuration changes can be made
when necessary, for example, float time, TIA gain, and
operating mode. There are two ways to monitor ambient light
levels. One way is to use TIA ADC mode in the alternate time
slot and continuously monitor the ambient light level. The other
way is to use a feature of the ADPD1080/ADPD1081 where
the ambient light level is automatically monitored in the
background during float mode operation and is compared
against a user-defined threshold. If the ambient light level
exceeds this threshold by some user-defined number of times,
the device sets a flag that can be read by the user or can be
output to a GPIO. Table 35 lists all the registers used to monitor
the ambient light level while in float LED mode.
The user sets an ambient level threshold in the BG_THRESH
register, which is the threshold by which the ADC result of the
subtract cycles in float LED mode are compared against. The
subtract cycles in float LED mode are the positions in the pulse
sequence in which the LED pulse is masked; therefore, it is the
background level measurement. The ADC result is equal to the
raw ADC output minus the contents of the ADC offset register
(Register 0x18 to Register 0x1B and Register 0x1E to Register 0x21).
In the BG_COUNT register, the user sets a limit on the number
of cycles that BG_THRESH is exceeded by the ADC result before
the BG_STATUS bit is set for any particular channel. Every
time the BG_THRESH value is exceeded by the ADC result
during a subtract cycle, an internal counter increments. Each
channel has its own counter. When this count exceeds the limit
set in the BG_COUNT register, the BG_STATUS bit is set for the
channel. The user can periodically monitor the BG_STATUS
register to check for asserted bits. Alternatively, a GPIOx pin
can be asserted if a BG_STATUS flag is set. See Table 35 for
the various logical combinations of BG_STATUS flags and
interrupts that can be brought out on a GPIOx.
Table 35. Registers for Monitoring the Ambient Light Level in Float LED Mode
Register
Float Mode Register Name Time Slot A Time Slot B Description
BG_STATUS_x 0x04, Bits[3:0] 0x04, Bits[7:4] Status of comparison between background light level and background
threshold value (BG_THRESH). A 1 in any bit location means the threshold
has been crossed BG_COUNT number of times. This register is cleared once
it is read.
Bit 0: Time Slot A, Channel 1 exceeded threshold count.
Bit 1: Time Slot A, Channel 2 exceeded threshold count.
Bit 2: Time Slot A, Channel 3 exceeded threshold count.
Bit 3: Time Slot A, Channel 4 exceeded threshold count.
Bit 4: Time Slot B, Channel 1 exceeded threshold count.
Bit 5: Time Slot B, Channel 2 exceeded threshold count.
Bit 6: Time Slot B, Channel 3 exceeded threshold count.
Bit 7: Time Slot B, Channel 4 exceeded threshold count.
BG_THRESH_x 0x16, Bits[13:0] 0x1C[13:0] The background threshold that is compared against the ADC result during
the subtract cycles during float mode. If the ADC result exceeds the value
in this register, BG_COUNT is incremented.
BG_COUNT_x 0x16, Bits[15:14] 0x1C[15:14] This is the number of times the ADC value exceeds the BG_THRESH value
during the float mode subtract cycles before the BG_STATUS bit is set.
0x0: never set BG_STATUS.
0x1: set when BG_THRESH is exceeded 1 time.
0x02: set when BG_THRESH is exceeded 4 times.
0x03: set when BG_THRESH is exceeded 16 times.
GPIO0_ALT_CFG 0x0B[4:0] 0x0B[4:0] GPIO0 asserts for the following conditions:
0x10: logical OR of BG_STATUS, Bits[3:0].
0x1A: logical OR of BG_STATUS, Bits[7:4].
0x1B: logical OR of BG_STATUS, Bits[7:0].
0x1C: logical OR of BG_STATUS, Bits[7:0] and INT.
GPIO1_ALT_CFG 0x0B[12:8] 0x0B[12:8] GPIO1 asserts for the following conditions:
0x10: logical OR of BG_STATUS, Bits[3:0].
0x1A: logical OR of BG_STATUS, Bits[7:4].
0x1B: logical OR of BG_STATUS, Bits[7:0].
0x1C: logical OR of BG_STATUS, Bits[7:0] and INT.
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