Datasheet

ADPD1080/ADPD1081 Data Sheet
Rev. B | Page 38 of 74
In such a case, the ADPD1080/ADPD1081 operate at 2× the
sampling rate, and the LED settings can be reconfigured
during the sleep period between samples. If identical LED
settings (current and timing) are used for the LEDs being
muxed, up to four LEDs can be sampled per sampling period
without host intervention. An example of this configuration is
shown in Figure 45.
The f
S
/2 timing signal always starts in an active low state when
the device switches from standby mode to normal operating
mode and transitions to a high state at the completion of the
first sample.
V
LED
ADPD1080/
ADPD1081
LEDx
GPIOx
0
1
16110-045
Figure 45. Example Using the f
S
/2 Timing Signal
Logic 0 Output
Setting Register 0x0B, Bits[12:8] or Bits[4:0] = 0x10 configures
the respective pin to provide a Logic 0 output.
Logic 1 Output
Setting Register 0x0B, Bits[12:8] or Bits[4:0] = 0x11 configures
the respective pin to provide a Logic 1 output.
32 kHz Oscillator Output
Setting Register 0x0B, Bits[12:8] or Bits[4:0] = 0x13 configures
the respective pin to provide a copy of the on-board 32 kHz
oscillator.
CALCULATING CURRENT CONSUMPTION
The current consumption of the ADPD1080/ADPD1081 depends
on the user selected operating configuration, as determined by
the following equations.
Total Power Consumption
To calculate the total power consumption, use Equation 4.
Total Power = I
VDD_AVG
× V
DD
+ I
LEDA_AVG
× V
LEDA
+
I
LEDB_AVG
× V
LEDB
(4)
Average V
DD
Supply Current
To calculate the average V
DD
supply current, use Equation 5.
I
VDD_AVG
= DR × ((I
AFE_A
× t
SLOTA
) + (I
AFE_B
× t
SLOTB
) +
Q
PROC_X
) + I
VDD_STANDBY
(5)
where:
DR is the data rate in Hz.
I
VDD_STANDBY
= 0.2 µA.
Q
PROC_X
is an average charge associated with a processing time.
When only Time Slot A is enabled,
Q
PROC_A
(C) = 0.35 × 10
−6
When only Time Slot B is enabled,
Q
PROC_B
(C) = 0.24 × 10
−6
When Time Slot A and Time Slot B are enabled,
Q
PROC_AB
(C) = 0.40 × 10
−6
I
AFE_x
(A) = 3.0 × 10
−3
+ (1.5 × 10
−3
× NUM_CHANNELS) +
(4.6 × 10
−3
× I
LEDX_PK
/SCALE_X) (6)
t
SLOTx
(sec) = LEDx_OFFSET + LEDx_PERIOD ×
PULSE_COUNT (7)
where:
NUM_CHANNELS is the number of active channels.
I
LEDX_PK
is the peak LED current, expressed in amps, for whichever
LED is enabled in that particular time slot.
SCALE_X is the scale factor for the LED current drive determined
by Bit 13 of the ILEDx_COARSE registers, Register 0x22,
Register 0x23, and Register 0x24.
LEDx_OFFSET is the pulse start time offset expressed in
seconds.
LEDx_PERIOD is the pulse period expressed in seconds.
PULSE_COUNT is the number of pulses.
If either Time Slot A or Time Slot B are disabled, I
AFE_x
= 0 for that
respective time slot. Additionally, if operating in TIA ADC mode,
set Register 0x3C, Bits[8:3] = 010010 to achieve power savings.
This setting disables the BPFs that are bypassed in TIA ADC
mode, changing the AFE power contribution calculation to
I
AFE_x
(mA) = 3.0 × 10
−3
+ (1.0 × 10
−3
× NUM_CHANNELS) +
(4.6 × 10
−3
× I
LEDX_PK
/SCALE_X) (8)
Average V
LEDA
Supply Current
To calculate the average V
LEDA
supply current, use Equation 9.
I
LED_AVG_A
= SLOTA_LED_WIDTH × I
LEDA_PK
× DR ×
PULSE_COUNT (9)
where:
SLOTA_LED_WIDTH is the LED pulse width expressed in
seconds.
I
LEDA_PK
is the peak current, expressed in amps, for whichever
LED is selected for Time Slot A.
Average V
LEDB
Supply Current
To calculate the average V
LEDB
supply current, use Equation 10.
I
LED_AVG_B
= SLOTB_LED_WIDTH × I
LEDB_PK
× DR ×
PULSE_COUNT (10)
where:
SLOTB_LED_WIDTH is the LED pulse width expressed in
seconds.
I
LEDB_PK
is the peak current, expressed in amps, for whichever
LED is selected for Time Slot B.
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