Datasheet

Data Sheet ADPD1080/ADPD1081
Rev. B | Page 35 of 74
Interrupt-Based Method
To read data from the FIFO using an interrupt-based method,
use the following procedure:
1. In program mode, set the configuration of the time slots as
desired for operation.
2. Write to Register 0x11 with the desired data format for
each time slot.
3. Set FIFO_THRESH in Register 0x06, Bits[13:8] to the
interrupt threshold. A recommended value for this is the
number of 16-bit words in a data packet minus 1, which
causes an interrupt to generate when there is at least one
complete packet in the FIFO.
4. Enable the FIFO interrupt by writing 0 to the FIFO_
INT_MASK in Register 0x01, Bit 8. Also, configure the
interrupt pin (GPIO0 or GPIO1) by writing the
appropriate value to the bits in Register 0x02.
5. Enter normal operation mode by setting Register 0x10 to 0x2.
6. When an interrupt occurs,
a. There is no requirement to read the FIFO_SAMPLES bits
because the interrupt is generated only if there is one or
more full packets. Optionally, the interrupt routine can
check for the presence of more than one available packet
by reading these bits.
b. Read a complete packet using one or more multiword
accesses using Register 0x60. Reading the FIFO
automatically frees the space for new samples.
The FIFO interrupt automatically clears immediately upon reading
any data from the FIFO and is set again only when the FIFO is
written and the number of words is more than the threshold.
Polling Method
To read data from the FIFO in a polling method, use the
following procedure:
1. In program mode, set the configuration of the time slots as
desired for operation.
2. Write to Register 0x11 with the desired data format for
each time slot.
3. Enter normal operation mode by setting Register 0x10 to 2.
Next, begin the polling operations.
1. Wait for the polling interval to expire.
2. Read the FIFO_SAMPLES bits (Register 0x00, Bits[15:8]).
3. If FIFO_SAMPLES ≥ the packet size, read a packet using
the following steps:
a. Read a complete packet using one or more multiword
accesses via Register 0x60. Reading the FIFO
automatically frees the space for new samples.
b. Repeat Step 1.
When a mode change is required, or any other disruption to
normal sampling is necessary, clear the FIFO. Use the following
procedure to clear the state and empty the FIFO:
1. Enter program mode by setting Register 0x10 to 0x1.
2. Write 1 to Register 0x00, Bit 15.
Reading Data from Registers Using Interrupts
The latest sample data is always available in the data registers
and is updated simultaneously at the end of each time slot. The
data value for each photodiode channel is available as a 16-bit
value in Register 0x64 through Register 0x67 for Time Slot A,
and Register 0x68 through Register 0x6B for Time Slot B. If
allowed to reach their maximum value, Register 0x64 through
Register 0x6B clip. If Register 0x64 through Register 0x6B
saturate, the unsaturated (up to 27 bits) values for each channel
are available in Register 0x70 through Register 0x77 for Time
Slot A and Register 0x78 through Register 0x7F for Time Slot B.
Sample interrupts are available to indicate when the registers
are updated and can be read. To use the interrupt for a given
time slot, use the following procedure:
1. Enable the sample interrupt by writing a 0 to the appropriate
bit in Register 0x01. To enable the interrupt for Time Slot A,
write 0 to Bit 5. To enable the interrupt for Time Slot B,
write 0 to Bit 6. Either or both interrupts can be set.
2. Configure the interrupt pin (GPIOx) by writing the
appropriate value to the bits in Register 0x02.
3. An interrupt generates when the data registers are updated.
4. The interrupt handler must perform the following:
a. Read Register 0x00 and observe Bit 5 or Bit 6 to confirm
which interrupt occurred. This step is not required if
only one interrupt is in use.
b. Read the data registers before the next sample can be
written. The system must have interrupt latency and
service time short enough to respond before the next
data update, based on the output data rate.
c. Write a 1 to Bit 5 or Bit 6 in Register 0x00 to clear the
interrupt.
If both time slots are in use, it is possible to use only the
Time Slot B interrupt to signal when all registers can be read. It
is recommended to use the multiword read to transfer the data
from the data registers.
Reading Data from Registers Without Interrupts
If the system interrupt response is not fast or predictable enough to
use the interrupt method, or if the interrupt pin (GPIOx) is not
used, it is possible to obtain reliable data access by using the data
hold mechanism. To guarantee that the data read from the registers
is from the same sample time, it is necessary to prevent the
update of samples while reading the current values. The method
for performing register reads without interrupt timing is as
follows:
1. Write 1 to the SLOTA_DATA_HOLD or SLOTB_DATA_
HOLD bits (Register 0x5F, Bit 1 and Bit 2, respectively) for
the time slot requiring access (both time slots can be
accessed). This setting prevents sample updates.
2. Read the registers as desired.
3. Write 0 to the SLOTA_DATA_HOLD or SLOTB_DATA_
HOLD bits (Register 0x5F, Bit 1 and Bit 2, respectively)
previously set. Sample updates are allowed again.
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