Datasheet

ADPD1080/ADPD1081 Data Sheet
Rev. B | Page 12 of 74
SPI Timing Specifications
DVDD = 1.7 V to 1.9 V, T
A
= 40°C to +85°C, unless otherwise noted.
Table 7.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
SPI PORT
SPI Port available on ADPD1081 only
SCLK
Frequency f
SCLK
10 MHz
Minimum Pulse Width
High t
SCLKPWH
20 ns
Low t
SCLKPWL
20 ns
CS
Setup Time t
CS
S
CS
setup to SCLK rising edge 10 ns
Hold Time t
CS
H
CS
hold from SCLK rising edge 10 ns
Pulse Width High t
CS
PWH
CS
pulse width high 10 ns
MOSI
Setup Time t
MOSIS
MOSI setup to SCLK rising edge 10 ns
Hold Time t
MOSIH
MOSI hold from SCLK rising edge 10 ns
MISO Output Delay t
MISO valid output delay from SCLK falling edge 21 ns
SPI Timing Diagram
CS
t
CSS
t
MOSIS
t
MOSIH
t
MISOD
t
SCLKPWH
t
SCLKPWL
t
CSH
t
CSPWH
SCLK
MISO
MOSI
16110-004
Figure 4. SPI Timing Diagram
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