Charge Pump, 7-Channel Fun Lighting LED Driver ADP8863 FEATURES TYPICAL OPERATING CIRCUIT VALS PHOTO SENSOR D1 D2 D3 D4 D5 D6 D7 CMP_IN 0.1µF VIN CIN 1µF VOUT COUT 1µF VDDIO C1+ ADP8863 nRST C1– nINT C1 1µF C2+ SDA C2– SCL GND1 GND2 C2 1µF 08392-001 Automated blinking and funlight timing for each LED driver 16 programmable fade in and fade out times 0.1 sec to 5.
ADP8863 TABLE OF CONTENTS Features .............................................................................................. 1 Automated RGB Color Fades ................................................... 15 Applications ....................................................................................... 1 Backlight Operating Levels ....................................................... 16 Typical Operating Circuit ................................................................
ADP8863 SPECIFICATIONS VIN = 3.6 V, SCL = 2.7 V, SDA = 2.7 V, nINT = open, nRST = 2.7 V, CMP_IN = 0 V, VD1:D7 = 0.4 V, Capacitor C1 = 1 μF, Capacitor C2 = 1 μF, COUT = 1 μF, typical values are at TA = 25°C and are not guaranteed, minimum and maximum limits are guaranteed from TA = −40°C to +85°C, unless otherwise noted. Table 1.
ADP8863 Parameter FAULT PROTECTION Start-Up Charging Current Source Output Voltage Threshold Exit Soft Start Short-Circuit Protection Output Overvoltage Protection Activation Level OVP Recovery Hysteresis Thermal Shutdown Threshold Hysteresis Isolation from Input to Output During Fault Time to Validate a Fault I2C INTERFACE Operating VDDIO Voltage Logic Low Input 2 Logic High Input 3 I2C TIMING SPECIFICATIONS Delay from Reset Deassertion to I2C Access SCL Frequency SCL High Time SCL Low Time Setup Time Data
ADP8863 ABSOLUTE MAXIMUM RATINGS MAXIMUM TEMPERATURE RANGES Table 2. Parameter VIN, VOUT D1, D2, D3, D4, D5, D6, and D7 CMP_IN nINT, nRST, SCL, and SDA Output Short-Circuit Duration Operating Ambient Temperature Range Operating Junction Temperature Range Storage Temperature Range Soldering Conditions ESD (Electrostatic Discharge) Human Body Model (HBM) Charged Device Model (CDM) 1 Rating −0.3 V to +6 V −0.3 V to +6 V −0.3 V to +6 V −0.
ADP8863 16 D7 17 D6 19 D5 20 D4 18 CMP_IN PIN CONFIGURATION AND FUNCTION DESCRIPTIONS D1 3 13 VOUT nRST 5 4 C1+ VOUT VIN GND1 C2+ C2– D7 D6 C1– SDA CMP_IN D5 GND2 nINT D1 D4 nRST SCL D2 D3 C 12 C2+ SCL 4 3 B 14 VIN TOP VIEW (Not to Scale) 2 A 15 GND1 D3 1 D2 2 1 D 11 C1+ Figure 3. LFCSP Pin Configuration 08392-052 NOTES 1. CONNECT THE EXPOSED PADDLE TO GND1 AND/OR GND2.
ADP8863 TYPICAL PERFORMANCE CHARACTERISTICS VIN = 3.6 V, SCL = 2.7 V, SDA = 2.7 V, nRST = 2.7 V, VD1:D7 = 0.4 V, CIN = 1 μF, Capacitor C1 = 1 μF, Capacitor C2 = 1 μF, COUT = 1 μF, TA= 25°C, unless otherwise noted. 2.0 35 VIN = 3.6V ID1:D7 = 30mA IOUT = NO LOAD 1.8 30 1.6 25 1.4 IOUT (mA) 1.0 0.8 20 D1 15 D2 0.6 D3 10 D4 –40°C +25°C +85°C +105°C 2.0 2.5 3.0 3.5 4.0 4.5 5.0 D6 D7 5.5 VIN (V) 0 Figure 5. Typical Quiescent Current, G = 1× 0 0.6 0.8 1.0 1.2 1.4 1.6 1.8 35 34 4.
ADP8863 35 1.0 VIN = 3.6V ID1:D7 = 30mA IOUT = 100mA 0.9 30 0.8 0.7 20 ROUT (Ω) 15 0.6 0.5 0.4 0.3 10 –40°C +25°C +85°C +105°C 0.1 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 –40°C +25°C +85°C +105°C 0.2 2.0 VHR (V) 0 2.0 08392-010 5 3.0 3.5 4.0 4.5 5.0 5.5 VIN (V) Figure 11. Typical Diode Current vs. Current Sink Headroom Voltage (VHR) 1 2.5 08392-013 IOUT (mA) 25 Figure 14. Typical ROUT (G = 1×) vs. VIN 10 VIN = 3.6V VD1:D7 = 0.
ADP8863 1.4 1.3 90 450 80 400 70 350 60 300 50 250 40 200 30 150 20 100 1.0 0.9 –40°C +25°C +85°C +105°C 0.7 2.5 3.0 3.5 4.0 4.5 5.0 IOUT = 140mA, Vf = 3.1V 10 5.5 VIN (V) 08392-035 0.8 0 2.5 50 IOUT = 210mA, Vf = 3.2V 3.0 3.5 IIN (mA) 1.1 4.0 4.5 5.0 0 5.5 08392-018 EFFICIENCY (%) IALS (mA) 1.2 VIN (V) Figure 17. Typical ALS Current, IALS Figure 20. Typical Efficiency (Low Vf Diode) 5.4 VIN = 3V GAIN = 2× IOUT = 10mA 5.3 450 90 400 80 5.
ADP8863 T CIN = 10pF, COUT = 1µF C1 = 1µF, C2 = 1µF VIN = 3.7V IOUT = 30mA (ONE DIODE AT MAX CURRENT) VIN (AC-COUPLED) 50mV/DIV 1 VOUT (1V/DIV) VOUT (AC-COUPLED) 50mV/DIV 2 2 IIN (10mA/DIV) IIN (AC-COUPLED) 10mA/DIV 500ns/DIV 4 IOUT (10mA/DIV) Figure 23. Typical Operating Waveforms, G = 1.5× Figure 25. Typical Start-Up Waveform T VIN (AC-COUPLED) 50mV/DIV 1 VOUT (AC-COUPLED) 50mV/DIV 2 IIN (AC-COUPLED) 10mA/DIV 500ns/DIV 08392-022 3 CIN = 1µF, COUT = 1µF, C1 = 1µF, C2 = 1µF VIN = 2.
ADP8863 THEORY OF OPERATION operate backlight LEDs. A full set of safety features, including short-circuit, overvoltage, and overtemperature protection with input-to-output isolation, allows for a robust and safe design. The integrated soft start limits inrush currents at startup, restart attempts, and gain transitions. The ADP8863 combines a powerful LED charge pump driver with independent control of up to seven LEDs. These LED drivers can sink up to 30 mA (typical) on six channels.
ADP8863 in parallel and are discharged to VOUT in parallel. In certain fault modes, the switches are opened and the output is physically isolated from the input. POWER STAGE Because typical white LEDs require up to 4 V to drive them, some form of boosting is required over the typical variation in battery voltage. The ADP8863 accomplishes this with a high efficiency charge pump capable of producing a maximum IOUT of 240 mA over the entire input voltage range (2.5 V to 5.5 V).
ADP8863 Soft Start Feature Shutdown Mode At startup (either from UVLO activation or fault/standby recovery), the output is first charged by ISS (3.75 mA typical) until it reaches about 92% of VIN. This soft start feature reduces the inrush current that is otherwise present when the output capacitance is initially charged to VIN. When this point is reached, the controller enters G = 1× mode.
ADP8863 30 LED GROUPINGS Each LED can respond individually or be grouped together into the backlight controls. By default, all LEDs are set to be part of the backlight. This is changed by setting Bits[6:0] in Register 0x05. LEDs that are set up as independent sinks can be enabled individually in Register 0x10. They can also all be enabled simultaneously via the SIS_EN bit in Register 0x01. Any LEDs configured for the backlight can only be enabled via the BL_EN bit in Register 0x01.
ADP8863 The Cubic 10 and Cubic 11 laws also use the square law LED currents derived from Equation 3; however, the time between each step is varied to produce a steeper slope at higher currents and a shallower slope at lower currents (see Figure 30). ISCx ON TIME FADE-IN ON TIME FADE-OUT FADE-IN FADE-OUT MAX 30 25 OFF TIME 20 OFF TIME 15 08392-029 CURRENT (mA) LINEAR SCx_EN SQUARE SET BY USER 10 Figure 31. Independent Sink Blink Mode with Fading CUBIC 11 RGB COLOR GENERATION 5 0 0 0.
ADP8863 BACKLIGHT CURRENT BACKLIGHT OPERATING LEVELS By default, the backlight operates at daylight level (BLV = 00), where the maximum brightness is set using Register 0x09 (BLMX1). A daylight dim setting can also be set using Register 0x0A (BLDM1). When operating at office level (BLV = 01), the backlight maximum and dim brightness settings are set using Register 0x0B (BLMX2) and Register 0x0C (BLDM2).
ADP8863 BACKLIGHT CURRENT starts counting. When the off timer expires, the internal state machine clears the BL_EN bit, and the backlight turns off. BACKLIGHT CURRENT OFF TIMER RUNNING FADE-IN OVERRIDDEN FADE-OUT OVERRIDDEN BL_EN = 1 (REASSERTED) BL_EN = 0 BL_EN = 0 BL_EN = 1 MAX BL_EN = 1 Figure 39. Fade Override Function (FOVR Is High) 08392-041 BL_EN = 1 BL_EN = 0 SET BY USER SET BY INTERNAL STATE MACHINE AMBIENT LIGHT SENSING Figure 37.
ADP8863 ware may select the comparator of the phototransistor that is exposed to higher light intensity to control the transition between the programmed backlight intensity levels. L2_EN L2_TRIP L2_HYS PHOTO SENSOR OUTPUT L2_OUT FILTER SETTINGS ADC L3_TRIP L3_HYS 08392-045 L3_OUT L3_EN Figure 41. Ambient Light Sensing and Trip Comparators The L2 comparator, L2_CMPR, detects when the photosensor output has dropped below the programmable L2_TRP point (Register 0x1D).
ADP8863 USING THE ADP8863 TO DRIVE ADDITIONAL LEDS In some situations, it may be desirable to drive more than seven LEDs. This can be done in one of two ways: paralleling LEDs using ballast resistors, or using the ADP8863 to power additional LED drivers. Ballast Resistors D1 In the first method, multiple LEDs can be attached to any one LED driver with the use of ballast resistors.
ADP8863 KEYPAD OR FUN LIGHTING BACKLIGHT D2 VIN D3 D4 D5 D6 D7 D1 VOUT 1µF VALS PHOTO SENSOR CMP_IN D2 VIN D3 D4 D6 D7 D1 VOUT C1+ NC SDA C1– NC SCL C2+ NC C2– NC nRST 0.1µF D5 1µF 1µF ADP8861 C1+ ADP8863 nRST C1– SDA C1 1µF nINT C2+ SCL C2– GNDx C2 1µF 08392-047 nINT GNDx Figure 45.
ADP8863 SHORT-CIRCUIT PROTECTION MODE The ADP8863 can protect against short circuits on the output (VOUT). Short-circuit protection (SCP) is activated at the point when VOUT < 55% of VIN. Note that SCP sensing is disabled during both startup and restart attempts (fault recovery). SCP sensing is reenabled 4 ms (typical) after activation. During a short-circuit fault, the device enters a low current consumption state and an interrupt flag is set.
ADP8863 STANDBY 0 EXIT STANDBY 1 TSD FAULT DIE TEMP > TSD EXIT STBY 0 1 STARTUP: CHARGE VIN TO VOUT DIE TEMP < TSD – TSD(HYS) SCP FAULT 0 VOUT > VOUT(START) 1 0 EXIT STARTUP VOUT < VOUT(SC) 0 1 VOUT < VOVP – VOVP(HYS) 0 0 G=1 WAIT 100µs (TYP) MIN (VD1:D7) < VHR(UP) 1 VOUT > VOVP 1 OVP FAULT 1 1 G = 1.
ADP8863 APPLICATIONS INFORMATION The ADP8863 allows the charge pump to operate efficiently with a minimum of external components. Specifically, the user must select an input capacitor (CIN), output capacitor (COUT), and two charge pump fly capacitors (C1 and C2). CIN should be 1 μF or greater. The value must be high enough to produce a stable input voltage signal at the minimum input voltage and maximum output load. A 1 μF capacitor for COUT is recommended.
ADP8863 I2C PROGRAMMING AND DIGITAL CONTROL Table 8 to Table 84 provide register and bit descriptions. The reset value for all bits in the bit map tables is all 0s, except in Table 10 (see Table 10 for its unique reset value). Wherever the acronym N/A appears in the tables, it means not applicable. The ADP8863 provides full software programmability to facilitate its adoption in various product architectures. The I2C address is 0101011x (x = 0 during write, x = 1 during read).
ADP8863 Table 8.
ADP8863 Table 9. Register Map Addr (Hex) 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F 0x20 0x21 0x22 0x23 0x24 Reg.
ADP8863 Manufacturer and Device ID (MFDVID)—Register 0x00 This is a read-only register. Table 10. MFDVID Bit Map Bit 7 Bit 6 0 Bit 5 Manufacturer ID 0 Bit 4 1 Bit 3 0 Bit 2 1 Bit 1 Device ID 0 Bit 0 1 0 Mode Control Register (MDCR)—Register 0x01 Table 11. MDCR Bit Map Bit 7 Reserved Bit 6 INT_CFG Bit 5 nSTBY Bit 4 DIM_EN Bit 3 GDWN_DIS Bit 2 SIS_EN Bit 1 CMP_AUTOEN Bit 0 BL_EN Table 12. Bit Descriptions for the MDCR Register Bit Name N/A INT_CFG Bit No.
ADP8863 Mode Control Register 2 (MDCR2)—Register 0x02 Table 13. MDCR2 Bit Map Bit 7 Bit 6 Reserved Bit 5 Bit 4 SHORT_INT Bit 3 TSD_INT Bit 2 OVP_INT Bit 1 CMP2_INT Bit 0 CMP_INT Table 14. Bit Descriptions for the MDCR2 Register Bit Name N/A SHORT_INT Bit No. [7:5] 4 TSD_INT 3 OVP_INT 2 CMP2_INT 1 CMP_INT 0 1 Description 1 Reserved. Short-circuit error interrupt. 1 = a short-circuit or overload condition on VOUT has been detected.
ADP8863 BACKLIGHT REGISTER DESCRIPTIONS Configuration Register (CFGR)—Register 0x04 Table 17. CFGR Bit Map Bit 7 Reserved Bit 6 SEL_AB Bit 5 CMP2_SEL Bit 4 Bit 3 BLV Bit 2 Bit 1 Law Bit 0 FOVR Table 18. Bit Descriptions for the CFGR Register Bit Name N/A SEL_AB Bit No. 7 6 CMP2_SEL 5 BLV [4:3] Law [2:1] FOVR 0 Description Reserved. 1 = selects the second phototransistor (CMP_IN2) to control the backlight. 0 = selects the main phototransistor (CMP_IN) to control the backlight.
ADP8863 Bit Name D2EN Bit No. 1 D1EN 0 Description Diode 2 backlight sink enable 1 = selects LED2 as an independent sink 0 = connects LED2 sink to backlight enable (BL_EN) Diode 1 backlight sink enable 1 = selects LED1 as an independent sink 0 = connects LED1 sink to backlight enable (BL_EN) Backlight Off Timeout (BLOFF)—Register 0x06 Table 21. BLOFF Bit Map Bit 7 Reserved Bit 6 Bit 5 Bit 4 Bit 3 OFFT Bit 2 Bit 1 Bit 0 Table 22. Bit Descriptions for the BLOFF Register Bit Name N/A OFFT Bit No.
ADP8863 Backlight Fade (BLFR)—Register 0x08 Table 25. BLFR Bit Map Bit 7 Bit 6 Bit 5 BL_FO Bit 4 Bit 3 Bit 2 Bit 1 BL_FI Bit 0 Table 26. Bit Descriptions for the BLFR Register Bit Name BL_FO Bit No. [7:4] BL_FI [3:0] 1 Description Backlight fade out rate. If fade out is disabled (BL_FO = 0000), the backlight changes instantly (within 100 ms). If the fade out rate is set, the backlight fades from its current value to the dim or the off value.
ADP8863 Backlight Level 1 (Daylight) Maximum Current Register (BLMX1)—Register 0x09 Table 27. BLMX1 Bit Map Bit 7 Reserved Bit 6 Bit 5 Bit 4 Bit 3 BL1_MC Bit 2 Bit 1 Bit 0 Table 28. Bit Descriptions for the BLMX1 Register Bit Name N/A BL1_MC Bit No. 7 [6:0] Description Reserved. Backlight Level 1 (daylight) maximum current. The backlight maximum current can be set according to the linear or square law function (see Table 29 for a complete list of values).
ADP8863 DAC Code 0x44 0x45 0x46 0x47 0x48 0x49 0x4A 0x4B 0x4C 0x4D 0x4E 0x4F 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5A 0x5B 0x5C 0x5D 0x5E 0x5F 0x60 0x61 0x62 0x63 Linear Law (mA) 16.063 16.299 16.535 16.772 17.008 17.244 17.480 17.717 17.953 18.189 18.425 18.661 18.898 19.134 19.370 19.606 19.842 20.079 20.315 20.551 20.787 21.024 21.260 21.496 21.732 21.968 22.205 22.441 22.677 22.913 23.150 23.386 Square Law (mA) 1 8.601 8.855 9.114 9.376 9.642 9.912 10.185 10.463 10.743 11.028 11.316 11.
ADP8863 Backlight Level 1 (Daylight) Dim Current Register (BLDM1)—Register 0x0A Table 30. BLDM1 Bit Map Bit 7 Reserved Bit 6 Bit 5 Bit 4 Bit 3 BL1_DC Bit 2 Bit 1 Bit 0 Table 31. Bit Descriptions for the BLDM1 Register Bit Name N/A BL1_DC Bit No. 7 [6:0] Description Reserved. Backlight Level 1 (daylight) dim current. The backlight is set to the dim current value after a dim timeout or if the DIM_EN flag is set by the user (see Table 29 for a complete list of values).
ADP8863 Backlight Level 2 (Office) Dim Current Register (BLDM2)—Register 0x0C Table 34. BLDM2 Bit Map Bit 7 Reserved Bit 6 Bit 5 Bit 4 Bit 3 BL2_DC Bit 2 Bit 1 Bit 0 Table 35. Bit Descriptions for the BLDM2 Register Bit Name N/A BL2_DC Bit No. 7 [6:0] Description Reserved. Backlight Level 2 (office) dim current. See Table 29 for a complete list of values. The backlight is set to the dim current value after a dim timeout or if the DIM_EN flag is set by the user.
ADP8863 Backlight Level 3 (Dark) Dim Current Register (BLDM3)—Register 0x0E Table 38. BLDM3 Bit Map Bit 7 Reserved Bit 6 Bit 5 Bit 4 Bit 3 BL3_DC Bit 2 Bit 1 Bit 0 Table 39. Bit Descriptions for the BLDM3 Register Bit Name N/A BL3_DC Bit No. 7 [6:0] Description Reserved. Backlight Level 3 (dark) dim current. See Table 29 for a complete list of values. The backlight is set to the dim current value after a dim timeout or if the DIM_EN flag is set by the user.
ADP8863 Bit Name SC4_EN Bit No. 3 SC3_EN 2 SC2_EN 1 SC1_EN 0 Description This enable acts upon LED4. 1 = SC4 is turned on. 0 = SC4 is turned off. This enable acts upon LED3. 1 = SC3 is turned on. 0 = SC3 is turned off. This enable acts upon LED2. 1 = SC2 is turned on. 0 = SC2 is turned off. This enable acts upon LED1. 1 = SC1 is turned on. 0 = SC1 is turned off. Independent Sink Current Time (ISCT1)—Register 0x11 Table 44.
ADP8863 Independent Sink Current Time (ISCT2)—Register 0x12 Table 46. ISCT2 Bit Map Bit 7 Bit 6 SC4OFF Bit 5 Bit 4 SC3OFF Bit 3 Bit 2 SC2OFF Bit 1 Bit 0 SC1OFF Table 47. Bit Descriptions for the ISCT2 Register Bit Name SC4OFF Bit No. [7:6] SC3OFF [5:4] SC2OFF [3:2] SC1OFF [1:0] 1 2 Description 1, 2 SC4 off time. When the SC off time is disabled, the ISC remains on while enabled.
ADP8863 Independent Sink Current Fade (ISCF)—Register 0x13 Table 48. ISCF Bit Map Bit 7 Bit 6 Bit 5 SCFO Bit 4 Bit 3 Bit 2 Bit 1 SCFI Bit 0 Table 49. Bit Descriptions for the ISCF Register Bit Name SCFO Bit No. [7:4] SCFI [3:0] Description Sink current fade out rate. The times listed here are for a full-scale fade out (30 mA to 0 mA). Fades between closer current values reduce the fade time. See the Automated Fade In and Fade Out section for more information. 0000 = disabled 0001 = 0.
ADP8863 Sink Current Register LED7 (ISC7)—Register 0x14 Table 50. ISC7 Bit Map Bit 7 SCR Bit 6 Bit 5 Bit 4 Bit 3 SCD7 Bit 2 Bit 1 Bit 0 Table 51. Bit Descriptions for the ISC7 Register Bit Name SCR Bit No. 7 SCD7 [6:0] Description 1 = Sink Current 1. 0 = Sink Current 0. For Sink Current 0, use the following DAC code schedule (see Table 29 for a complete list of values). DAC Linear Law (mA) Square Law (mA) 0000000 0.000 0 0000001 0.236 0.002 0000010 0.472 0.007 0000011 0.709 0.
ADP8863 DAC Code 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3A 0x3B 0x3C 0x3D 0x3E 0x3F 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4A 0x4B 0x4C 0x4D 0x4E 0x4F 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 Linear Law (mA) 22.68 23.15 23.62 24.09 24.57 25.04 25.51 25.98 26.46 26.93 27.40 27.87 28.35 28.82 29.29 29.76 30.24 30.71 31.18 31.65 32.13 32.60 33.07 33.54 34.02 34.49 34.96 35.43 35.91 36.38 36.85 37.32 37.80 38.27 38.74 39.21 39.69 40.16 40.63 41.10 Square Law (mA) 1 8.57 8.932 9.3 9.
ADP8863 Sink Current Register LED6 (ISC6)—Register 0x15 Table 53. ISC6 Bit Map Bit 7 Reserved Bit 6 Bit 5 Bit 4 Bit 3 SCD6 Bit 2 Bit 1 Bit 0 Table 54. Bit Descriptions for the ISC6 Register Bit Name N/A SCD6 Bit No. 7 [6:0] Description Reserved. Sink current. Use the following DAC code schedule (see Table 29 for a complete list of values). DAC Linear Law (mA) Square Law (mA) 0000000 0 0.000 0000001 0.236 0.002 0000010 0.472 0.007 0000011 0.709 0.
ADP8863 Sink Current Register LED3 (ISC3)—Register 0x18 Table 59. ISC3 Bit Map Bit 7 Reserved Bit 6 Bit 5 Bit 4 Bit 3 SCD3 Bit 2 Bit 1 Bit 0 Table 60. Bit Descriptions for the ISC3 Register Bit Name N/A SCD3 Bit No. 7 [6:0] Description Reserved. Sink current. Use the following DAC code schedule (see Table 29 for a complete list of values). DAC Linear Law (mA) Square Law (mA) 0000000 0 0.000 0000001 0.236 0.002 0000010 0.472 0.007 0000011 0.709 0.
ADP8863 COMPARATOR REGISTER DESCRIPTIONS Comparator Configuration (CCFG)—Register 0x1B Table 65. CCFG Bit Map Bit 7 Bit 6 FILT Bit 5 Bit 4 FORCE_RD Bit 3 L3_OUT Bit 2 L2_OUT Bit 1 L3_EN Bit 0 L2_EN Table 66. Bit Descriptions for the CCFG Register Bit Name FILT Bit No. [7:5] FORCE_RD 4 L3_OUT L2_OUT L3_EN 3 2 1 L2_EN 0 Description Filter setting for the CMP_IN light sensor.
ADP8863 Comparator Level 2 Threshold (L2_TRP)—Register 0x1D Table 69. L2_TRP Bit Map Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 L2_TRP Bit 2 Bit 1 Bit 0 Table 70. Bit Descriptions for the L2_TRP Register Bit Name L2_TRP Bit No. [7:0] Description Comparator Level 2 threshold. If the comparator input is below L2_TRP, the comparator trips and the backlight enters Level 2 (office) mode. The following lists the code settings for the photosensor current: 00000000 = 0 μA 00000001 = 4.3 μA 00000010 = 8.
ADP8863 Comparator Level 3 Threshold (L3_TRP)—Register 0x1F Table 73. L3_TRP Bit Map Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 L3_TRP Bit 2 Bit 1 Bit 0 Table 74. Bit Descriptions for the L3_TRP Register Bit Name L3_TRP Bit No. 7:0 Description Comparator Level 3 threshold. If the comparator input is below L3_TRP, the comparator trips and the backlight enters Level 3 (dark) mode. The following lists the code settings for photosensor current: 00000000 = 0 μA 00000001 = 0.54 μA 00000010 = 1.08 μA 00000011 = 1.
ADP8863 First Phototransistor Register: High Byte (PH1LEVH)—Register 0x22 Table 79. PH1LEVH Bit Map Bit 7 Bit 6 Reserved Bit 5 Bit 4 Bit 3 Bit 2 PH1LEV_HIGH Bit 1 Bit 0 Table 80. Bit Descriptions for the PH1LEVH Register Bit Name N/A PH1LEV_HIGH Bit No. [7:5] [4:0] Description Reserved. Upper five bits of the 13-bit conversion value for the first light sensor (Bit 12 to Bit 8). The value is updated every 80 ms (when the light sensor is enabled). This is a read-only register.
ADP8863 OUTLINE DIMENSIONS PIN 1 INDICATOR 4.10 4.00 SQ 3.90 0.30 0.25 0.20 0.50 BSC 20 16 15 PIN 1 INDICATOR 1 EXPOSED PAD 2.65 2.50 SQ 2.35 5 11 SEATING PLANE 10 6 0.25 MIN BOTTOM VIEW 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.20 REF FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. COMPLIANT TO JEDEC STANDARDS MO-220-WGGD. Figure 51.
ADP8863 0.645 0.600 0.555 1.995 1.955 1.915 3 4 SEATING PLANE 2 1 A BALL A1 IDENTIFIER B 2.395 2.355 2.315 0.287 0.267 0.247 1.60 REF C D E 0.40 REF 0.415 0.400 0.385 BOTTOM VIEW (BALL SIDE UP) 0.05 MAX COPLANARITY 0.230 0.200 0.170 021009-A TOP VIEW (BALL SIDE DOWN) DIRECTION OF FEED 08392-051 Figure 53. 20-Ball Wafer Level Chip Scale Package [WLCSP] (CB-20-6) Dimensions shown in millimeters Figure 54.
ADP8863 NOTES Rev.
ADP8863 NOTES Rev.
ADP8863 NOTES I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors). ©2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08392-0-6/10(A) Rev.