Datasheet

ADP8860
Rev. 0 | Page 15 of 52
V
IN
nSTBY
nRST
V
OUT
V
IN
SHUTDOWN
V
IN
CROSSES ~2.05V AND TRIGGERS POWER ON RESET
BIT nSTBY IN REGISTER
MDCR GOES HIGH
nRST MUST BE HIGH FOR 20µs (MAX)
BEFORE SENDING I
2
C COMMANDS
nRST IS LOW, WHICH FORCES nSTBY LOW
AND RESETS ALL I
2
C REGISTERS
GAIN CHANGES ONLY OCCUR WHEN NECESSARY,
~100µs DELAY BETWEEN POWER UP AND
WHEN I
2
C COMMANDS CAN BE RECEIVED
~3.75mA CHARGES
V
OUT
TO V
IN
LEVEL
25µs TO 100µs NOISE FILTER
BUT HAVE A MIN TIME BEFORE CHANGING
1×
1.5×
2×
SOFT STARTSOFT START
10µs 100µs
0
7967-013
Figure 28. Typical Timing Diagram