Datasheet

ADP667
REV. 0
–4–
APPLICATIONS INFORMATION
Circuit Configurations
For a fixed +5 V output the SET input should be grounded, and
no external resistors are necessary. This basic configuration is
shown in Figure 2. The input voltage can range from +5.15 V
to +16.5 V, and output currents up to 250 mA are available
provided that the maximum package power dissipation is not
exceeded.
IN
OUT
GNDSET SHDN
ADP667
+5V
OUTPUT
C1
10µF
++
Figure 2. Fixed +5 V Output Circuit
Output Voltage Setting
If the SET input is connected to a resistor divider network, the
output voltage is set according to the following equation:
V
OUT
=V
SET
×
R1+ R2
R1
where V
SET
= 1.255 V.
IN
OUT
GND
SET
SHDN
ADP667
+
R1
R2
V
IN
V
OUT
C1
10µF
Figure 3. Adjustable Output Circuit
The resistor values may be selected by first choosing a value for
R1 and then selecting R2 according to the following equation:
R2 = R1 ×
V
OUT
V
SET
−1






The input leakage current on SET is 10 nA maximum. This
allows large resistor values to be chosen for R1 and R2 with
little degradation in accuracy. For example, a 1 MΩ resistor
may be selected for R1, and then R2 may be calculated accord-
ingly. The tolerance on SET is guaranteed at less than ±25 mV,
so in most applications fixed resistors will be suitable.
Shutdown Input (SHDN)
The SHDN input allows the regulator to be switched off with a
logic level signal. This will disable the output and reduce the
current drain to a low quiescent (1 µA maximum) current. This
is very useful for low power applications. Driving the SHDN in-
put to greater than 1.5 V places the part in shutdown.
If the shutdown function is not being used, then SHDN should
be connected to GND.
Low Supply or Low Battery Detection
The ADP667 contains on-chip circuitry for low power supply or
battery detection. If the voltage on the LBI pin falls below the
internal 1.255 V reference, then the open drain output LBO will
go low. The low threshold voltage may be set to any voltage
above 1.255 V by appropriate resistor divider selection.
R3 = R4 ×
V
BATT
V
LBI
–1




where R3 and R4 are the resistive divider resistors and V
BATT
is
the desired low voltage threshold.
Since the LBI input leakage current is less than 10 nA, large val-
ues may be selected for R3 and R4 in order to minimize loading.
For example, a 6 V low threshold, may be set using 10 MΩ for
R3 and 2.7 MΩ for R4.
The LBO output is an open-drain output that goes low sinking
current when LBI is less than 1.255 V. A pull-up resistor of
10 kΩ or greater may be used to obtain a logic output level with
the pull-up resistor connected to V
OUT
.
IN
OUT
LBO
ADP667
C1
10µF
+
10kΩ
V
IN
LBI
GND SETSHDN
R3
R4
LOW BATTERY
STATUS OUTPUT
V
OUT
Figure 4. Low Battery/Supply Detect Circuit