Datasheet

ADP5588 Data Sheet
Rev. C | Page 6 of 28
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
PIN 1
INDICATOR
NOTES
1. NC = NO CONNECT.
2. EXPOSED PAD MUST BE CONNECTED TO GROUND.
1R7
2R6
3R5
4R4
5R3
6R2
15 C6
16 C7
17 CMP_IN1/C8
18 CMP_IN2/C9
14 C5
13 C4
7
R1
8R0
9C0
11C2
12C3
10C1
21
V
CC
22
SDA
23
SCL
24
INT
20
RST
19
GND
TOP VIEW
(Not to Scale)
ADP5588
07673-003
Figure 3. Pin Configuration
Table 9. Pin Function Descriptions
Pin No. Mnemonic Description
1 R7 GPIO, Row 7 in the Keypad Matrix.
2 R6 GPIO, Row 6 in the Keypad Matrix.
3 R5 GPIO, Row 5 in the Keypad Matrix.
4 R4 GPIO, Row 4 in the Keypad Matrix.
5 R3 GPIO, Row 3 in the Keypad Matrix.
6 R2 GPIO, Row 2 in the Keypad Matrix.
7 R1 GPIO, Row 1 in the Keypad Matrix.
8
R0
GPIO, Row 0 in the Keypad Matrix.
9 C0 GPIO, Column 0 in the Keypad Matrix.
10 C1 GPIO, Column 1 in the Keypad Matrix.
11 C2 GPIO, Column 2 in the Keypad Matrix.
12 C3 GPIO, Column 3 in the Keypad Matrix.
13 C4 GPIO, Column 4 in the Keypad Matrix.
14 C5 GPIO, Column 5 in the Keypad Matrix.
15 C6 GPIO, Column 6 in the Keypad Matrix.
16 C7 GPIO, Column 7 in the Keypad Matrix.
17 CMP_IN1/C8 GPIO, Column 8 in the Keypad Matrix; Comparator Input for Photosensor 1.
18 CMP_IN2/C9 GPIO, Column 9 in the Keypad Matrix; Comparator Input for Photosensor 2.
19 GND Ground.
20
RST
Hardware Reset (Active Low). This bit resets the device to the power default conditions. The reset pin must be
driven for a minimum of 50 μs to be valid and to prevent falsing due to ESD glitches or noise in the system. If
not used,
RST
must be tied high with a pull-up.
21 V
CC
V
CC
= 1.7 V to 3.3 V.
22 SDA I
2
C Serial Data (Open Drain Requires External Pull-up).
23
SCL
I
2
C Clock.
24
INT
Processor Interrupt, Active Low, Open Drain. This pin can be pulled up to 2.7 V or 1.8 V for selection flexibility in
the processor GPIO supply group.
EP EPAD Exposed Pad. The exposed pad must be connected to ground.