Datasheet

Data Sheet ADP5588
Rev. C | Page 21 of 28
COMPARATOR REGISTER DESCRIPTIONS
Table 37. CMP_CFG_STAT—Register 0x30 (Comparator Configuration and Status Register)
Field Bit Description
CMP2_L3_OUT 7
Sensor 2 Comparator L3 output.
0: Ambient light is greater than Level 3 (dark).
1: L3_CMP has detected a change in ambient light from Level 2 (office) to L3 (dark).
CMP2_L2_OUT 6
Sensor 2 Comparator L2 output.
0: Ambient light is greater than Level 2 (office).
1: L2_CMP has detected a change in ambient light from Level 1 (outdoor) to L2 (office).
CMP1_L3_OUT 5
Sensor 1 Comparator L3 output.
0: Ambient light is greater than Level 3 (dark).
1: L3_CMP has detected a change in ambient light from Level 2 (office) to L3 (dark).
CMP1_L2_OUT 4
Sensor 1 Comparator L2 output.
0: Ambient light is greater than Level 2 (office).
1: L2_CMP has detected a change in ambient light from Level 1 (outdoor) to L2 (office).
CMP2_IEN 3
Sensor 2 comparator interrupt.
0: Interrupt disabled.
1: Interrupt enabled.
CMP1_IEN 2
Sensor 1 comparator interrupt.
0: Interrupt disabled.
1: Interrupt enabled.
CMP2_EN 1
Sensor 2 comparator input.
0: Input disabled.
1: Input enabled.
CMP1_EN 0
Sensor 1 comparator input.
0: Input disabled.
1: Input enabled.
Table 38. CMP_CONFG_SENS1—Register 0x31 (Sensor 1 Comparator Configuration Register)
Field Bit Description
[7:6] Not used.
FILT (2-0) [5:3] Programs the number of consecutive measurements required to transition the L2 and L3 levels.
FILT Number Required Approximate Time (sec)
000 1 0.08
001 2 0.16
010 4 0.32
011 8 0.64
100 16 1.28
101 32 2.56
110 64 5.12
111 128 10.24
FORCE_RD 2
1: Forces a read of the light sensor; reset by the internal state machine after conversion is complete and
L2_OUT and L3_OUT are valid.
1
L3_EN 1 1: Enables the L3 comparator for Sensor 1 input.
0: Disables the L3 comparator for Sensor 1 input.
L2_EN 0 1: Enables the L2 comparator for Sensor 1 input.
0: Disables the L2 comparator for Sensor 1 input.
Note that the L3 comparator has priority over the L2 comparator.
1
When the software forces a conversion, the state machine clears the forced bit after the conversion is done and the proper registers have been updated.